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Re: [Qemu-devel] [PATCH] correctly check ppr priority during interrupt i


From: Yoshiaki Tamura
Subject: Re: [Qemu-devel] [PATCH] correctly check ppr priority during interrupt injection
Date: Mon, 7 Feb 2011 08:45:00 +0900

2011/2/6 Gleb Natapov <address@hidden>:
>
> TPR blocks all interrupts in a priority class, so simple "less or
> equal" check is not enough.
>
> Signed-off-by: Gleb Natapov <address@hidden>
> diff --git a/hw/apic.c b/hw/apic.c
> index 2f8376a..cbac75d 100644
> --- a/hw/apic.c
> +++ b/hw/apic.c
> @@ -372,19 +372,33 @@ static int apic_get_arb_pri(APICState *s)
>     return 0;
>  }
>
> -/* signal the CPU if an irq is pending */
> -static void apic_update_irq(APICState *s)
> +
> +/*
> + * <0 - low prio interrupt,
> + * 0  - no interrupt,
> + * >0 - interrupt number
> + */
> +static int apic_irq_pending(APICState *s)
>  {
>     int irrv, ppr;
> -    if (!(s->spurious_vec & APIC_SV_ENABLE))
> -        return;
>     irrv = get_highest_priority_int(s->irr);
>     if (irrv < 0)
> -        return;
> +        return 0;
>     ppr = apic_get_ppr(s);
>     if (ppr && (irrv & 0xf0) <= (ppr & 0xf0))
> +        return -1;

Just a minor point: braces are missing.  checkpatch.pl would
help.

Yoshi

> +
> +    return irrv;
> +}
> +
> +/* signal the CPU if an irq is pending */
> +static void apic_update_irq(APICState *s)
> +{
> +    if (!(s->spurious_vec & APIC_SV_ENABLE))
>         return;
> -    cpu_interrupt(s->cpu_env, CPU_INTERRUPT_HARD);
> +    if (apic_irq_pending(s) > 0) {
> +        cpu_interrupt(s->cpu_env, CPU_INTERRUPT_HARD);
> +    }
>  }
>
>  void apic_reset_irq_delivered(void)
> @@ -590,12 +604,13 @@ int apic_get_interrupt(DeviceState *d)
>     if (!(s->spurious_vec & APIC_SV_ENABLE))
>         return -1;
>
> -    /* XXX: spurious IRQ handling */
> -    intno = get_highest_priority_int(s->irr);
> -    if (intno < 0)
> +    intno = apic_irq_pending(s);
> +
> +    if (intno == 0) {
>         return -1;
> -    if (s->tpr && intno <= s->tpr)
> +    } else if (intno < 0) {
>         return s->spurious_vec & 0xff;
> +    }
>     reset_bit(s->irr, intno);
>     set_bit(s->isr, intno);
>     apic_update_irq(s);
> --
>                        Gleb.
>
>



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