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[Qemu-devel] Re: [PATCH v2 1/9] pci: pci_default_cap_write_config ignore


From: Michael S. Tsirkin
Subject: [Qemu-devel] Re: [PATCH v2 1/9] pci: pci_default_cap_write_config ignores wmask
Date: Sat, 13 Nov 2010 23:09:40 +0200
User-agent: Mutt/1.5.21 (2010-09-15)

On Fri, Nov 12, 2010 at 10:46:10AM -0700, Alex Williamson wrote:
> Make use of wmask, just like the rest of config space.
> 
> Signed-off-by: Alex Williamson <address@hidden>

Hmm, this will create conflicts on merging with qemu.kvm
which already has w1mask in same function.
I'll apply a patch splitting mask use to a separate function
to make life easier for you.

> ---
> 
>  hw/pci.c |   22 ++++++++++------------
>  1 files changed, 10 insertions(+), 12 deletions(-)
> 
> diff --git a/hw/pci.c b/hw/pci.c
> index 92aaa85..4bc5882 100644
> --- a/hw/pci.c
> +++ b/hw/pci.c
> @@ -1175,13 +1175,15 @@ uint32_t pci_default_read_config(PCIDevice *d,
>      return pci_read_config(d, address, len);
>  }
>  
> -static void pci_write_config(PCIDevice *pci_dev,
> -                             uint32_t address, uint32_t val, int len)
> +static void pci_write_config_with_mask(PCIDevice *d, uint32_t addr,
> +                                       uint32_t val, int l)
>  {
>      int i;
> -    for (i = 0; i < len; i++) {
> -        pci_dev->config[address + i] = val & 0xff;
> -        val >>= 8;
> +    uint32_t config_size = pci_config_size(d);
> +
> +    for (i = 0; i < l && addr + i < config_size; val >>= 8, ++i) {
> +        uint8_t wmask = d->wmask[addr + i];
> +        d->config[addr + i] = (d->config[addr + i] & ~wmask) | (val & wmask);
>      }
>  }
>  
> @@ -1202,23 +1204,19 @@ uint32_t pci_default_cap_read_config(PCIDevice 
> *pci_dev,
>  void pci_default_cap_write_config(PCIDevice *pci_dev,
>                                    uint32_t address, uint32_t val, int len)
>  {
> -    pci_write_config(pci_dev, address, val, len);
> +    pci_write_config_with_mask(pci_dev, address, val, len);
>  }
>  
>  void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int 
> l)
>  {
> -    int i, was_irq_disabled = pci_irq_disabled(d);
> -    uint32_t config_size = pci_config_size(d);
> +    int was_irq_disabled = pci_irq_disabled(d);
>  
>      if (pci_access_cap_config(d, addr, l)) {
>          d->cap.config_write(d, addr, val, l);
>          return;
>      }
>  
> -    for (i = 0; i < l && addr + i < config_size; val >>= 8, ++i) {
> -        uint8_t wmask = d->wmask[addr + i];
> -        d->config[addr + i] = (d->config[addr + i] & ~wmask) | (val & wmask);
> -    }
> +    pci_write_config_with_mask(d, addr, val, l);
>  
>  #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
>      if (kvm_enabled() && kvm_irqchip_in_kernel() &&



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