Re: [Qemu-devel] [PATCH] target-arm: Handle 'smc' as an undefined instruction

[Adam Lackorzynski]

On Thu Sep 02, 2010 at 23:14:23 +0100, Peter Maydell wrote:
> On Thu, Sep 02, 2010 at 11:40:50PM +0200, Adam Lackorzynski wrote:
> > +        case 7:
> > +            /* SMC? */
> > +            if ((insn & 0xfffffff0) == 0xe1600070) {
> > +                goto illegal_op;
> > +            }
> > +            /* bkpt */
> 
> This doesn't look right to me. SMC in the ARM encoding is a standard
> conditionalised instruction, so you shouldn't be mandating that the
> cond field is 0xe.

True.

> I think the correct way to distinguish BKPT from SMC is to look at
> bits [22..21] of the instruction: 01 for BKPT, 11 for SMC and
> other combinations are UNDEFINED. This is in 'op1' at this point
> in the code...

target-arm: Handle 'smc' as an undefined instruction

Refine check on bkpt so that smc is handled as an undefined instruction.

Signed-off-by: Adam Lackorzynski <address@hidden>
---
 target-arm/translate.c |    6 +++++-
 1 files changed, 5 insertions(+), 1 deletions(-)

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 6fcdd7e..fac4f5d 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -6346,7 +6346,11 @@ static void disas_arm_insn(CPUState * env, DisasContext 
*s)
             dead_tmp(tmp2);
             store_reg(s, rd, tmp);
             break;
-        case 7: /* bkpt */
+        case 7:
+            if (op1 != 1) {
+                goto illegal_op;
+            }
+            /* bkpt */
             gen_set_condexec(s);
             gen_set_pc_im(s->pc - 4);
             gen_exception(EXCP_BKPT);
-- 
1.7.1


Thanks,
Adam
-- 
Adam                 address@hidden
  Lackorzynski         http://os.inf.tu-dresden.de/~adam/