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[Qemu-devel] [PATCH v2 00/15] pci: handle BAR mapping at PCI level
From: |
Blue Swirl |
Subject: |
[Qemu-devel] [PATCH v2 00/15] pci: handle BAR mapping at PCI level |
Date: |
Mon, 12 Jul 2010 18:39:37 +0000 |
In this version, map_func is retained for compatibility, so the patch
set shouldn't break anything anymore. At least i386, Sparc64 and PPC
seem to work. The original patch is now in small pieces.
Compatibility also means that at this point I did not touch the harder
stuff (virtio-pci/MSI-X, VGA, map_func which update state). One
possible way is to change map_func to post_map_func, meaning that the
mapping is handled by pci.c but the update information is passed to
the post mapping handler which can then update coalesced_mmio, MSI-X
stuff or just the register base.
I considered a few possible alternative directions:
* Merge CPURead/WriteFunc and IOPortRead/WriteFunc. Should be doable.
The functions should be changed to a common signature. We could also
have a combined PCIRead/WriteFunc, which would use PCIDevice * instead
of void *. Perhaps it's better to do this at a later phase.
* Add pci_bar_map_ioio(PCIDevice *, int bar, int subregion,
IOPortReadFunc *, int size) and pci_bar_map_mmio(), which would do
cpu_register_memory/io (so that bus level can adjust the mappings with
later patches) This was my original motivation of the patch set, but I
think the required logic is already with this set in pci.c. However
especially pci_bar_map_mmio() seems to be tricky. See for example
macio.c, which combines several non-PCI devices to one, there the
memory functions are not available but memory index is.
* Add simple replacements (like in my original patch set) for
cpu_register_physical_memory/io(): pci_register_memory/io(). In the
macio case, non-PCI devices would not use pci_register_memory, which
would probably be OK, but ugly.
* Move BAR registration to qdev structure, something like:
static PCIDeviceInfo rtl8139_info = {
.qdev.name = "rtl8139",
[cut]
.bars = (PCIBar[][]) {
[0][0] = { 0x100, PCI_BASE_ADDRESS_SPACE_IO, rtl8139_io_reads,
rtl8139_io_writes}
[1][0] = { 0x100, PCI_BASE_ADDRESS_SPACE_MEMORY,
rtl8139_mmio_read, rtl8139_mmio_write}
};
But again the memory functions may not be so easily available, like in
pci_bar_map_mmio() case.
Comments? Would it be useful to push this?
Blue Swirl (15):
ioport: separate registration from mapping
pci: handle BAR mapping at PCI level
es1370: convert to pci_bar_map
ebus: convert to pci_bar_map
macio: convert to pci_bar_map
ne2000: convert to pci_bar_map
via: convert to pci_bar_map
piix: convert to pci_bar_map
cmd646: convert to pci_bar_map
openpic: convert to pci_bar_map
pcnet: convert to pci_bar_map
rtl8139: convert to pci_bar_map
usb-ohci: convert to pci_bar_map
usb-uhci: convert to pci_bar_map
wdt_i6300esb: convert to pci_bar_map
hw/es1370.c | 32 +++++------
hw/ide/cmd646.c | 149 +++++++++++++++++++++++++++++------------------
hw/ide/piix.c | 72 ++++++++++++++---------
hw/ide/via.c | 65 +++++++++++++--------
hw/isa.h | 1 +
hw/isa_mmio.c | 17 +++++-
hw/macio.c | 107 +++++++++++------------------------
hw/ne2000.c | 66 ++++++++++++++-------
hw/openpic.c | 36 ++----------
hw/pci.c | 166 ++++++++++++++++++++++++++++++++++------------------
hw/pci.h | 14 ++++-
hw/pcnet.c | 62 ++++++++++----------
hw/ppc_mac.h | 5 +-
hw/ppc_newworld.c | 2 +-
hw/ppc_oldworld.c | 4 +-
hw/rtl8139.c | 42 +++++--------
hw/sun4u.c | 29 +++------
hw/usb-ohci.c | 10 +---
hw/usb-uhci.c | 31 +++++-----
hw/wdt_i6300esb.c | 38 +++++--------
ioport.c | 117 +++++++++++++++++++++++++++++++++----
ioport.h | 6 ++
22 files changed, 616 insertions(+), 455 deletions(-)
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