[Qemu-devel] [PATCH 1/2] megasas: Use MFI interface definitions from mfi.h

[Hannes Reinecke]

The megasas driver was using it's own definitions.
Remove them.

Signed-off-by: Hannes Reinecke <address@hidden>
---
 hw/megasas.c |   68 +++++++++++++++------------------------------------------
 hw/mfi.h     |    5 ++-
 2 files changed, 21 insertions(+), 52 deletions(-)

diff --git a/hw/megasas.c b/hw/megasas.c
index 3dbab14..69c5037 100644
--- a/hw/megasas.c
+++ b/hw/megasas.c
@@ -43,39 +43,7 @@ do { fprintf(stderr, "megasas: error: " fmt , ## 
__VA_ARGS__);} while (0)
 #define MEGASAS_MAX_SGE 8
 #define MEGASAS_MAX_LUNS 128
 
-/* Register definitions */
-#define        MEGASAS_INBOUND_MSG_0                   0x0010
-#define        MEGASAS_INBOUND_MSG_1                   0x0014
-#define        MEGASAS_OUTBOUND_MSG_0                  0x0018
-#define        MEGASAS_OUTBOUND_MSG_1                  0x001C
-#define        MEGASAS_INBOUND_DOORBELL                0x0020
-#define        MEGASAS_INBOUND_INTR_STATUS             0x0024
-#define        MEGASAS_INBOUND_INTR_MASK               0x0028
-#define        MEGASAS_OUTBOUND_DOORBELL               0x002C
-#define        MEGASAS_OUTBOUND_INTR_STATUS            0x0030
-#define        MEGASAS_OUTBOUND_INTR_MASK              0x0034
-#define        MEGASAS_INBOUND_QUEUE_PORT              0x0040
-#define        MEGASAS_OUTBOUND_QUEUE_PORT             0x0044
-#define        MEGASAS_OUTBOUND_DOORBELL_CLEAR         0x00A0
-#define        MEGASAS_OUTBOUND_SCRATCH_PAD            0x00B0
-#define        MEGASAS_INBOUND_LOW_QUEUE_PORT          0x00C0
-#define        MEGASAS_INBOUND_HIGH_QUEUE_PORT         0x00C4
-
-/* MFI states */
-#define MFI_STATE_UNDEFINED                    0x0
-#define MFI_STATE_BB_INIT                      0x1
-#define MFI_STATE_FW_INIT                      0x4
-#define MFI_STATE_WAIT_HANDSHAKE               0x6
-#define MFI_STATE_FW_INIT_2                    0x7
-#define MFI_STATE_DEVICE_SCAN                  0x8
-#define MFI_STATE_BOOT_MESSAGE_PENDING         0x9
-#define MFI_STATE_FLUSH_CACHE                  0xA
-#define MFI_STATE_READY                                0xB
-#define MFI_STATE_OPERATIONAL                  0xC
-#define MFI_STATE_FAULT                                0xF
-
-#define MFI_REPLY_1078_MESSAGE_INTERRUPT       0x80000000
-
+/* Frame definitions */
 #define MEGASAS_FRAME_CMD_OFFSET               0x00
 #define MEGASAS_FRAME_SENSE_LEN_OFFSET         0x01
 #define MEGASAS_FRAME_CMD_STATUS_OFFSET        0x02
@@ -407,7 +375,7 @@ static int megasas_init_firmware(MPTState *s, struct 
megasas_cmd_t *cmd)
            (unsigned long)s->producer_pa, (unsigned long)s->consumer_pa);
 #endif
     s->reply_queue_index = ldl_phys(s->producer_pa);
-    s->fw_state = MFI_STATE_OPERATIONAL;
+    s->fw_state = MFI_FWSTATE_OPERATIONAL;
     cpu_physical_memory_unmap(initq, initq_size, 0, 0);
     return 0;
 }
@@ -739,7 +707,7 @@ static int megasas_handle_dcmd(MPTState *s, struct 
megasas_cmd_t *cmd)
 #ifdef DEBUG_MEGASAS_MFI
            DPRINTF("MFI DCMD Controller shutdown\n");
 #endif
-           s->fw_state = MFI_STATE_READY;
+           s->fw_state = MFI_FWSTATE_READY;
            retval = MFI_STAT_OK;
            break;
        case MFI_DCMD_PD_LIST_QUERY:
@@ -1025,18 +993,18 @@ static uint32_t megasas_mmio_readl(void *opaque, 
target_phys_addr_t addr)
     DPRINTF("readl mmio 0x%lx\n", (unsigned long)addr);
 #endif
     switch (addr) {
-       case MEGASAS_INBOUND_DOORBELL:
+       case MFI_IDB:
            return 0;
-       case MEGASAS_OUTBOUND_MSG_0:
-       case MEGASAS_OUTBOUND_SCRATCH_PAD:
-           return (s->fw_state & 0x0f) << 28 | ((s->fw_sge & 0xff) << 16) | 
(s->fw_cmds & 0xFFFF);
-       case MEGASAS_OUTBOUND_INTR_STATUS:
+       case MFI_OMSG0:
+       case MFI_OSP0:
+           return (s->fw_state & MFI_FWSTATE_MASK) | ((s->fw_sge & 0xff) << 
16) | (s->fw_cmds & 0xFFFF);
+       case MFI_OSTS:
            if (MEGASAS_INTR_ENABLED(s) && s->doorbell)
-               return MFI_REPLY_1078_MESSAGE_INTERRUPT | s->doorbell;
+               return MFI_1078_RM | s->doorbell;
            break;
-       case MEGASAS_OUTBOUND_INTR_MASK:
+       case MFI_OMSK:
            return s->intr_mask;
-       case MEGASAS_OUTBOUND_DOORBELL_CLEAR:
+       case MFI_ODCR0:
            return s->doorbell;
        default:
            BADF("readb 0x%lx\n", (unsigned long)addr);
@@ -1074,7 +1042,7 @@ static void megasas_mmio_writel(void *opaque, 
target_phys_addr_t addr,
 #endif
 
     switch (addr) {
-       case MEGASAS_INBOUND_DOORBELL:
+       case MFI_IDB:
            if (val & MFI_FWINIT_ABORT) {
                /* Abort all pending cmds */
                for (i = 0; i <= s->fw_cmds; i++)
@@ -1088,13 +1056,13 @@ static void megasas_mmio_writel(void *opaque, 
target_phys_addr_t addr,
                /* discard MFIs */
            }
            break;
-       case MEGASAS_OUTBOUND_INTR_MASK:
+       case MFI_OMSK:
            s->intr_mask = val;
            if (!MEGASAS_INTR_ENABLED(s)) {
                qemu_irq_lower(s->dev.irq[0]);
            }
            break;
-       case MEGASAS_OUTBOUND_DOORBELL_CLEAR:
+       case MFI_ODCR0:
            /* Update reply queue pointer */
 #ifdef DEBUG_MEGASAS_QUEUE
            DPRINTF("Update reply queue head %d busy %d\n",
@@ -1104,11 +1072,11 @@ static void megasas_mmio_writel(void *opaque, 
target_phys_addr_t addr,
            s->doorbell = 0;
            qemu_irq_lower(s->dev.irq[0]);
            break;
-       case MEGASAS_INBOUND_HIGH_QUEUE_PORT:
+       case MFI_IQPH:
            s->frame_hi = val;
            break;
-       case MEGASAS_INBOUND_LOW_QUEUE_PORT:
-       case MEGASAS_INBOUND_QUEUE_PORT:
+       case MFI_IQPL:
+       case MFI_IQP:
            /* Received MFI frames; up to 8 contiguous frames */
            frame_addr = (val & ~0xF);
            /* Add possible 64 bit offset */
@@ -1233,7 +1201,7 @@ static void megasas_soft_reset(MPTState *s)
     s->reply_queue_pa = 0;
     s->consumer_pa = 0;
     s->producer_pa = 0;
-    s->fw_state = MFI_STATE_READY;
+    s->fw_state = MFI_FWSTATE_READY;
     s->doorbell = 0;
     s->intr_mask = MEGASAS_INTR_DISABLED_MASK;
     s->frame_hi = 0;
diff --git a/hw/mfi.h b/hw/mfi.h
index 8d3f374..599c56e 100644
--- a/hw/mfi.h
+++ b/hw/mfi.h
@@ -85,6 +85,8 @@
 #define MFI_ODR0       0x9c            /* outbound doorbell register0 */
 #define MFI_ODCR0      0xa0            /* outbound doorbell clear register0  */
 #define MFI_OSP0       0xb0            /* outbound scratch pad0  */
+#define MFI_IQPL       0xc0            /* Inbound queue port (low bytes)  */
+#define MFI_IQPH       0xc4            /* Inbound queue port (high bytes)  */
 #define MFI_1078_EIM   0x80000004      /* 1078 enable intrrupt mask  */
 #define MFI_RMI                0x2             /* reply message interrupt  */
 #define MFI_1078_RM    0x80000000      /* reply 1078 message interrupt  */
@@ -100,8 +102,6 @@
  * skinny specific changes
  */
 #define MFI_SKINNY_IDB 0x00    /* Inbound doorbell is at 0x00 for skinny */
-#define MFI_IQPL       0x000000c0
-#define MFI_IQPH       0x000000c4
 #define MFI_SKINNY_RM  0x00000001      /* reply skinny message interrupt */
 
 /* Bits for MFI_OSTS */
@@ -117,6 +117,7 @@
 #define MFI_FWSTATE_WAIT_HANDSHAKE     0x60000000
 #define MFI_FWSTATE_FW_INIT_2          0x70000000
 #define MFI_FWSTATE_DEVICE_SCAN                0x80000000
+#define MFI_FWSTATE_BOOT_MSG_PENDING   0x90000000
 #define MFI_FWSTATE_FLUSH_CACHE                0xa0000000
 #define MFI_FWSTATE_READY              0xb0000000
 #define MFI_FWSTATE_OPERATIONAL                0xc0000000
-- 
1.6.0.2