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Re: [Qemu-devel] Re: [PATCH 2/3] target-sparc: Free instruction temporar
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] Re: [PATCH 2/3] target-sparc: Free instruction temporaries. |
Date: |
Sat, 17 Apr 2010 12:49:32 -0500 |
User-agent: |
Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.9) Gecko/20100330 Fedora/3.0.4-1.fc12 Thunderbird/3.0.4 |
On 04/17/2010 11:41 AM, Blue Swirl wrote:
> About this patch: it's good that we now free the constants, but
> constant handling is still not optimal and I think this series
> actually may add extra 'movi' ops in the worst case. It would be nice
> if we detected if constants are in play and call immediate versions
> (addi, subi etc) automatically. This may need bigger refactoring,
> though.
No, that won't help, since the first thing that addi, subi, etc
do is to load the constant into a temporary.
What would *really* help though, is something along the lines of
Aurelien's constant propagation patch, followed by some mechanism
to refactor constants in the backend.
Aurelien's patch does a good job of building the full constant
that the RISC instruction stream needed to use to generate the
full 32-bit or 64-bit constant. If the host is x86, that's just
about all we need. However, if the host is a RISC, we'll
generally need to decompose the constant again.
I've got the outline of an idea by which TCG can remember which
constants are actually loaded into registers. And it should be
designed so that the host backend can call into it to load other
constants. In this way when we have a pair of constants like
0xfff00011
0xfff00022
the sparc backend can (if things go well with register allocation)
load the %hi(0xfff00000) just once, and form the full constants
with addition from there.
r~