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[Qemu-devel] [PATCH 03/13] alpha: Expand zap/zapnot with immediate inlin
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 03/13] alpha: Expand zap/zapnot with immediate inline. |
Date: |
Thu, 10 Dec 2009 13:43:58 -0800 |
The vast majority of zap instructions have an immediate operand,
since zapnot is the canonical method to zero-extend from u16 or u32.
Signed-off-by: Richard Henderson <address@hidden>
---
target-alpha/translate.c | 61 ++++++++++++++++++++++++++++++++++++++++++++-
1 files changed, 59 insertions(+), 2 deletions(-)
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 4f923bb..bd193da 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -507,6 +507,65 @@ FCMOV(cmpfge)
FCMOV(cmpfle)
FCMOV(cmpfgt)
+/* Implement zapnot with an immediate operand, which expands to some
+ form of immediate AND. This is a basic building block in the
+ definition of many of the other byte manipulation instructions. */
+static inline void gen_zapnoti(int ra, int rc, uint8_t lit)
+{
+ uint64_t mask;
+ int i;
+
+ switch (lit) {
+ case 0x00:
+ tcg_gen_movi_i64(cpu_ir[rc], 0);
+ break;
+ case 0x01:
+ tcg_gen_ext8u_i64(cpu_ir[rc], cpu_ir[ra]);
+ break;
+ case 0x03:
+ tcg_gen_ext16u_i64(cpu_ir[rc], cpu_ir[ra]);
+ break;
+ case 0x0f:
+ tcg_gen_ext32u_i64(cpu_ir[rc], cpu_ir[ra]);
+ break;
+ case 0xff:
+ tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[ra]);
+ break;
+ default:
+ for (mask = i = 0; i < 8; ++i) {
+ if ((lit >> i) & 1)
+ mask |= 0xffull << (i * 8);
+ }
+ tcg_gen_andi_i64 (cpu_ir[rc], cpu_ir[ra], mask);
+ break;
+ }
+}
+
+static inline void gen_zapnot(int ra, int rb, int rc, int islit, uint8_t lit)
+{
+ if (unlikely(rc == 31))
+ return;
+ else if (unlikely(ra == 31))
+ tcg_gen_movi_i64(cpu_ir[rc], 0);
+ else if (islit)
+ gen_zapnoti(ra, rc, lit);
+ else
+ gen_helper_zapnot (cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]);
+}
+
+static inline void gen_zap(int ra, int rb, int rc, int islit, uint8_t lit)
+{
+ if (unlikely(rc == 31))
+ return;
+ else if (unlikely(ra == 31))
+ tcg_gen_movi_i64(cpu_ir[rc], 0);
+ else if (islit)
+ gen_zapnoti(ra, rc, ~lit);
+ else
+ gen_helper_zap (cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]);
+}
+
+
/* EXTWH, EXTWH, EXTLH, EXTQH */
static inline void gen_ext_h(void(*tcg_gen_ext_i64)(TCGv t0, TCGv t1),
int ra, int rb, int rc, int islit, uint8_t lit)
@@ -598,8 +657,6 @@ ARITH3(mskwl)
ARITH3(inswl)
ARITH3(mskll)
ARITH3(insll)
-ARITH3(zap)
-ARITH3(zapnot)
ARITH3(mskql)
ARITH3(insql)
ARITH3(mskwh)
- [Qemu-devel] [PATCH 00/13] Alpha emulation improvements, round two, Richard Henderson, 2009/12/11
- [Qemu-devel] [PATCH 02/13] alpha: Fix -d in_asm, Richard Henderson, 2009/12/11
- [Qemu-devel] [PATCH 01/13] alpha: Implement missing MVI instructions., Richard Henderson, 2009/12/11
- [Qemu-devel] [PATCH 03/13] alpha: Expand zap/zapnot with immediate inline.,
Richard Henderson <=
- [Qemu-devel] [PATCH 09/13] alpha: Expand msk*h inline., Richard Henderson, 2009/12/11
- [Qemu-devel] [PATCH 11/13] alpha: Fix FMOV., Richard Henderson, 2009/12/11
- [Qemu-devel] [PATCH 06/13] alpha: Implement RD/WRUNIQUE in the translator, Richard Henderson, 2009/12/11
- [Qemu-devel] [PATCH 10/13] alpha: Expand ins*h inline., Richard Henderson, 2009/12/11
- [Qemu-devel] [PATCH 05/13] alpha: Fix fbcond branch offset., Richard Henderson, 2009/12/11
- [Qemu-devel] [PATCH 13/13] alpha: Implement fp branch/cmov inline., Richard Henderson, 2009/12/11
- [Qemu-devel] [PATCH 07/13] alpha: Expand ins*l inline., Richard Henderson, 2009/12/11
- [Qemu-devel] [PATCH 04/13] alpha: Rewrite gen_ext_[hl] in terms of zapnot., Richard Henderson, 2009/12/11
- [Qemu-devel] [PATCH 08/13] alpha: Expand msk*l inline., Richard Henderson, 2009/12/11
- [Qemu-devel] [PATCH 12/13] alpha: Fix double log_cpu_state., Richard Henderson, 2009/12/11