Re: [Qemu-devel] Re: [PATCH] sparc32 irq clearing (guest Solaris performance+NetBSD) fix

[Jamie Lokier]

Artyom Tarasenko wrote:
> I don't know, how the real sun4m reacts in the case where irq stays
> on, not being cleared.
> It can not be though that it would try to process irq for every next
> tick. The CPU must have some time to clear the pending irq, so it must
> be edge triggered too, at least in a way.

In general, most CPUs have a "disable interrupts" flag which is set at
the same time as calling the irq handler.

That's enough, even if everything about interrupts is level triggered,
so you can't assume anything is edge triggered just from that alone.

However if a CPU doesn't have an "disable interrupts" flag, then of
course the triggering must be edge triggered somewhere.

-- Jamie