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Re: [Qemu-devel] [PATCH] qemu: msi irq allocation api


From: Blue Swirl
Subject: Re: [Qemu-devel] [PATCH] qemu: msi irq allocation api
Date: Wed, 20 May 2009 20:44:31 +0300

On 5/20/09, Michael S. Tsirkin <address@hidden> wrote:
> On Wed, May 20, 2009 at 08:21:01PM +0300, Blue Swirl wrote:
>  > On 5/20/09, Michael S. Tsirkin <address@hidden> wrote:
>  > > define api for allocating/setting up msi-x irqs, and for updating them
>  > >  with msi-x vector information, supply implementation in ioapic. Please
>  > >  comment on this API: I intend to port my msi-x patch to work on top of
>  > >  it.
>  > >
>  > >  Signed-off-by: Michael S. Tsirkin <address@hidden>
>  >
>  > Sparc64 also uses packets ("mondos", not implemented yet) for
>  > interrupt vector data, there the packet size is 8 * 64 bits.
>  > I think we should aim for a more generic API that covers this case also.
>
>
> Are you sure this is a good idea? MSI is tied to PCI, and PCI only has
>  MSI, not "mondos". What code would benefit from this abstraction?

Sparc64 emulation, of course. I think also the API would be neater.

>  > For example, irq.c could support opaque packet payload of
>  > unspecified/predefined size.  MSI packet structure should be defined
>  > in ioapic.c.
>
>
> Note that MSI does not have packets and MSI interrupts do not pass any 
> payload.

I don't know too much about MSI, what's the 'data' field in msi_state then?




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