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[Qemu-devel] [PATCH 23/24] Correctly decode hw_ld/hw_st opcodes for all
From: |
Tristan Gingold |
Subject: |
[Qemu-devel] [PATCH 23/24] Correctly decode hw_ld/hw_st opcodes for all alpha implementations. |
Date: |
Fri, 13 Mar 2009 15:20:42 +0100 |
Allow privilegied pal_code only in kernel mode.
Signed-off-by: Tristan Gingold <address@hidden>
---
target-alpha/translate.c | 32 ++++++++++++++++++++++++--------
1 files changed, 24 insertions(+), 8 deletions(-)
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 3eef2dc..6942453 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -52,6 +52,7 @@ struct DisasContext {
int pal_mode;
#endif
uint32_t amask;
+ uint32_t implver;
};
/* global register indexes */
@@ -103,6 +104,20 @@ static void alpha_translate_init(void)
done_init = 1;
}
+static inline int get_mxcr_iprn(DisasContext *ctx, uint32_t insn)
+{
+ switch (ctx->implver) {
+ case IMPLVER_2106x:
+ return insn & 0xff;
+ case IMPLVER_21164:
+ return insn & 0xffff;
+ case IMPLVER_21264:
+ return (insn >> 8) & 0xff;
+ default:
+ abort();
+ }
+}
+
static always_inline void gen_excp (DisasContext *ctx,
int exception, int error_code)
{
@@ -689,7 +704,7 @@ static always_inline int translate_one (DisasContext *ctx,
uint32_t insn)
#if !defined (CONFIG_USER_ONLY)
} else if (palcode < 0x40) {
/* Privileged PAL code */
- if (ctx->mem_idx & 1)
+ if (ctx->mem_idx != MMU_KERNEL_IDX)
goto invalid_opc;
else
gen_excp(ctx, EXCP_CALL_PALP + ((palcode & 0x3F) << 6), 0);
@@ -1748,7 +1763,7 @@ static always_inline int translate_one (DisasContext
*ctx, uint32_t insn)
if (!ctx->pal_mode)
goto invalid_opc;
if (ra != 31) {
- TCGv tmp = tcg_const_i32(insn & 0xFF);
+ TCGv tmp = tcg_const_i32(get_mxcr_iprn(ctx, insn));
gen_helper_mfpr(cpu_ir[ra], tmp, cpu_ir[ra]);
tcg_temp_free(tmp);
}
@@ -2063,9 +2078,9 @@ static always_inline int translate_one (DisasContext
*ctx, uint32_t insn)
if (!ctx->pal_mode)
goto invalid_opc;
else {
- TCGv tmp1 = tcg_const_i32(insn & 0xFF);
- if (ra != 31)
- gen_helper_mtpr(tmp1, cpu_ir[ra]);
+ TCGv tmp1 = tcg_const_i32(get_mxcr_iprn(ctx, insn));
+ if (rb != 31)
+ gen_helper_mtpr(tmp1, cpu_ir[rb]);
else {
TCGv tmp2 = tcg_const_i64(0);
gen_helper_mtpr(tmp1, tmp2);
@@ -2088,8 +2103,8 @@ static always_inline int translate_one (DisasContext
*ctx, uint32_t insn)
gen_helper_hw_rei();
} else {
TCGv tmp;
-
- if (ra != 31) {
+
+ if (rb != 31) {
tmp = tcg_temp_new();
tcg_gen_addi_i64(tmp, cpu_ir[rb], (((int64_t)insn << 51) >>
51));
} else
@@ -2097,7 +2112,7 @@ static always_inline int translate_one (DisasContext
*ctx, uint32_t insn)
gen_helper_hw_ret(tmp);
tcg_temp_free(tmp);
}
- ret = 2;
+ ret = 3;
break;
#endif
case 0x1F:
@@ -2353,6 +2368,7 @@ static always_inline void gen_intermediate_code_internal
(CPUState *env,
gen_opc_end = gen_opc_buf + OPC_MAX_SIZE;
ctx.pc = pc_start;
ctx.amask = env->amask;
+ ctx.implver = env->implver;
#if defined (CONFIG_USER_ONLY)
ctx.mem_idx = 0;
#else
--
1.6.2
- [Qemu-devel] [PATCH 13/24] Add target-alpha/machine.c with es40 machine emulation., (continued)
- [Qemu-devel] [PATCH 13/24] Add target-alpha/machine.c with es40 machine emulation., Tristan Gingold, 2009/03/13
- [Qemu-devel] [PATCH 14/24] Move softmmu_helper.h from exec.h to op_helper.c on alpha., Tristan Gingold, 2009/03/13
- [Qemu-devel] [PATCH 15/24] Document which IPR are used by 21264., Tristan Gingold, 2009/03/13
- [Qemu-devel] [PATCH 16/24] tb_flush helper should flush the tb (and not the tlb)., Tristan Gingold, 2009/03/13
- [Qemu-devel] [PATCH 17/24] Add instruction name in comments for hw_ld opcode., Tristan Gingold, 2009/03/13
- [Qemu-devel] [PATCH 18/24] Remove PALCODE_ declarations (unused)., Tristan Gingold, 2009/03/13
- [Qemu-devel] [PATCH 19/24] alpha ld helpers now directly return the value., Tristan Gingold, 2009/03/13
- [Qemu-devel] [PATCH 20/24] Add alpha_cpu_list., Tristan Gingold, 2009/03/13
- [Qemu-devel] [PATCH 21/24] Alpha: lower parent irq when irq is lowered., Tristan Gingold, 2009/03/13
- [Qemu-devel] [PATCH 22/24] Move linux-user pal emulation to linux-user/, Tristan Gingold, 2009/03/13
- [Qemu-devel] [PATCH 23/24] Correctly decode hw_ld/hw_st opcodes for all alpha implementations.,
Tristan Gingold <=
- [Qemu-devel] [PATCH 24/24] Add full emulation for 21264., Tristan Gingold, 2009/03/13
- Re: [Qemu-devel] [PATCH 20/24] Add alpha_cpu_list., Blue Swirl, 2009/03/13
- Re: [Qemu-devel] [PATCH 20/24] Add alpha_cpu_list., Tristan Gingold, 2009/03/16
- Re: [Qemu-devel] [PATCH 13/24] Add target-alpha/machine.c with es40 machine emulation., Blue Swirl, 2009/03/13
- Re: [Qemu-devel] [PATCH 13/24] Add target-alpha/machine.c with es40 machine emulation., Tristan Gingold, 2009/03/16
- Re: [Qemu-devel] [PATCH 09/24] Split cpu_mmu_index into cpu_mmu_index_data and cpu_mmu_index_code., Blue Swirl, 2009/03/13
Re: [Qemu-devel] [PATCH 0/24]: add alpha es40 system emulation, Blue Swirl, 2009/03/13