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[Qemu-devel] [6080] Handle suspend in qemu (Gleb Natapov)
From: |
Anthony Liguori |
Subject: |
[Qemu-devel] [6080] Handle suspend in qemu (Gleb Natapov) |
Date: |
Wed, 17 Dec 2008 22:32:52 +0000 |
Revision: 6080
http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=6080
Author: aliguori
Date: 2008-12-17 22:32:52 +0000 (Wed, 17 Dec 2008)
Log Message:
-----------
Handle suspend in qemu (Gleb Natapov)
Reset a PC and tell BIOS that resume from ram is required on the next boot.
Signed-off-by: Gleb Natapov <address@hidden>
Signed-off-by: Anthony Liguori <address@hidden>
Modified Paths:
--------------
trunk/hw/acpi.c
trunk/hw/pc.c
trunk/hw/pc.h
Modified: trunk/hw/acpi.c
===================================================================
--- trunk/hw/acpi.c 2008-12-17 22:29:37 UTC (rev 6079)
+++ trunk/hw/acpi.c 2008-12-17 22:32:52 UTC (rev 6080)
@@ -53,6 +53,8 @@
qemu_irq irq;
} PIIX4PMState;
+#define RSM_STS (1 << 15)
+#define PWRBTN_STS (1 << 8)
#define RTC_EN (1 << 10)
#define PWRBTN_EN (1 << 8)
#define GBL_EN (1 << 5)
@@ -151,6 +153,14 @@
case 0: /* soft power off */
qemu_system_shutdown_request();
break;
+ case 1:
+ /* RSM_STS should be set on resume. Pretend that resume
+ was caused by power button */
+ s->pmsts |= (RSM_STS | PWRBTN_STS);
+ qemu_system_reset_request();
+#if defined(TARGET_I386)
+ cmos_set_s3_resume();
+#endif
default:
break;
}
@@ -471,6 +481,17 @@
return 0;
}
+static void piix4_reset(void *opaque)
+{
+ PIIX4PMState *s = opaque;
+ uint8_t *pci_conf = s->dev.config;
+
+ pci_conf[0x58] = 0;
+ pci_conf[0x59] = 0;
+ pci_conf[0x5a] = 0;
+ pci_conf[0x5b] = 0;
+}
+
i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
qemu_irq sci_irq)
{
@@ -527,6 +548,8 @@
s->smbus = i2c_init_bus();
s->irq = sci_irq;
+ qemu_register_reset(piix4_reset, s);
+
return s->smbus;
}
Modified: trunk/hw/pc.c
===================================================================
--- trunk/hw/pc.c 2008-12-17 22:29:37 UTC (rev 6079)
+++ trunk/hw/pc.c 2008-12-17 22:32:52 UTC (rev 6080)
@@ -1135,6 +1135,14 @@
initrd_filename, 0, cpu_model);
}
+/* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
+ BIOS will read it and start S3 resume at POST Entry */
+void cmos_set_s3_resume(void)
+{
+ if (rtc_state)
+ rtc_set_memory(rtc_state, 0xF, 0xFE);
+}
+
QEMUMachine pc_machine = {
.name = "pc",
.desc = "Standard PC",
Modified: trunk/hw/pc.h
===================================================================
--- trunk/hw/pc.h 2008-12-17 22:29:37 UTC (rev 6079)
+++ trunk/hw/pc.h 2008-12-17 22:32:52 UTC (rev 6080)
@@ -82,6 +82,7 @@
RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq);
void rtc_set_memory(RTCState *s, int addr, int val);
void rtc_set_date(RTCState *s, const struct tm *tm);
+void cmos_set_s3_resume(void);
/* pc.c */
extern int fd_bootchk;
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