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Re: [Qemu-devel] Sparc32: Mask writes to the WIM register
From: |
Blue Swirl |
Subject: |
Re: [Qemu-devel] Sparc32: Mask writes to the WIM register |
Date: |
Tue, 19 Aug 2008 22:00:30 +0300 |
On 8/19/08, Luis Pureza <address@hidden> wrote:
> On Tue, Aug 19, 2008 at 5:48 PM, Blue Swirl <address@hidden> wrote:
> > On 8/19/08, Luis Pureza <address@hidden> wrote:
> >> The following patch, for Sparc32, correctly masks the WIM register, so
> >> that bits relative to non-existent windows remain cleared.
> >> This fixes a problem I was having with RTEMS.
> >
> > Thanks. The wim mask can be calculated at translation time, so perhaps
> > you could propose a new patch where only an "andi_i32" is added?
>
>
> That was my first try, but then I realized I can't access
> env->nwindows from within disas_sparc_insn(). So I'm not really sure
> what's the best approach to somehow store the result of (1 <<
> env->windows) - 1 in a way that's accessible inside
> disas_sparc_insn(). What do you think?
At gen_intermediate_code_internal(), env is still accessible, so
nwindows could be copied to a new field of dc there.
> > Could you give an URL to an .iso image or something so I could add
> > RTEMS to my set of tests?
>
>
> I'm afraid it's not that simple, as the RTEMS tasks I'm running depend
> on a lot of stuff that's not yet into QEMU trunk (namely support for
> the LEON2 and ERC32 processors). But you might be able to compile
> something for the sun4 architecture and execute it from there.
>
> By the way, it is my wish to submit this work to QEMU. However, I
> faced some "integration issues" and I had to modify some TARGET_SPARC
> bits that were too coupled with the sun4 architecture. And I wanted to
> discuss with you how to deal with these differences. Do you mind if I
> send you a private email one of these days detailing the issues?
No problem.