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Re: [Qemu-devel] [RFC] TCG support for OSX/ppc


From: Blue Swirl
Subject: Re: [Qemu-devel] [RFC] TCG support for OSX/ppc
Date: Sat, 26 Jul 2008 14:18:19 +0300

On 7/26/08, Andreas Färber <address@hidden> wrote:
>  With this patch applied, I get the following immediate error when running
> qemu-system-sparc:
>
>  qemu: fatal: Trap 0x07 while interrupts disabled, Error state
>  pc: 00004120  npc: 00004124
>  General Registers:
>  %g0: 00000000   %g1: 7120010c   %g2: 00000000   %g3: 71200100
>  %g4: 00000000   %g5: 00000000   %g6: 00000000   %g7: 00000000
>  Current Register Window:
>  %o0: 00000000   %o1: 00000000   %o2: 00000000   %o3: 00000000
>  %o4: 00000000   %o5: 00000000   %o6: 00000000   %o7: 00000000
>  %l0: 00000000   %l1: 00000000   %l2: 00000000   %l3: 00000000
>  %l4: 00000000   %l5: 00000000   %l6: 00000000   %l7: 00000000
>  %i0: 00000000   %i1: 00000000   %i2: 00000000   %i3: 00000000
>  %i4: 00000000   %i5: 00000000   %i6: 00000000   %i7: 00000000
>
>  Floating Point Registers:
>  %f00: 000000000.000000 000000000.000000 000000000.000000 000000000.000000
>  %f04: 000000000.000000 000000000.000000 000000000.000000 000000000.000000
>  %f08: 000000000.000000 000000000.000000 000000000.000000 000000000.000000
>  %f12: 000000000.000000 000000000.000000 000000000.000000 000000000.000000
>  %f16: 000000000.000000 000000000.000000 000000000.000000 000000000.000000
>  %f20: 000000000.000000 000000000.000000 000000000.000000 000000000.000000
>  %f24: 000000000.000000 000000000.000000 000000000.000000 000000000.000000
>  %f28: 000000000.000000 000000000.000000 000000000.000000 000000000.000000
>  psr: 0x044000c0 -> Z--- SP- wim: 0x00000001
>  fsr: 0x00080000
>  ../qemu-debian-sparc.command: line 3:  1259 Abort trap
> /Users/andreas/Q/latest/bin/qemu-system-sparc -hda
> /Users/andreas/Documents/QEMU/DebianSparc.qvm/Harddisk_1.qcow2
> -m 256

The trap is for unaligned access in 0x4120:
0x0000411c:  lduba  [ %g1 ] #ASI_M_BYPASS, %g2
0x00004120:  stba  %g0, [ %g1 ] #ASI_M_BYPASS

%g1 is used for unsigned byte load in 0x411c and the address is
correct (NVRAM Sparc structure). I would start debugging by looking at
how the store is implemented (out_asm).

>  Probably I'm missing something obvious... Any hints or requests how to
> improve the patch appreciated.

Instead of using 24 or 8 in tcg-target.c, you could use
TCG_TARGET_CALL_STACK_OFFSET. I don't know where 8 vs 4 in LWZ/STW
comes from, but you could introduce a define there as well.

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