[Qemu-devel] [PATCH 2/5] simplify cpu_exec

[Glauber Costa]

This is a first attempt to simplify cpu_exec(): it has simply
too many ifdefs, which is not a very good practice at all.

Following some work I've already posted in the past, I'm moving the target-b
ifdefs to target-xxx/helper.c, encapsuled into relevant functions.

Signed-off-by: Glauber Costa <address@hidden>
---
 cpu-exec.c          |   43 ++-----------------------------------------
 exec-all.h          |    1 +
 target-alpha/exec.h |    3 +++
 target-arm/exec.h   |    3 +++
 target-cris/exec.h  |    3 +++
 target-i386/exec.h  |   15 +++++++++++++++
 target-m68k/exec.h  |   15 +++++++++++++++
 target-mips/exec.h  |    3 +++
 target-ppc/exec.h   |    3 +++
 target-sh4/exec.h   |    3 +++
 target-sparc/exec.h |    3 +++
 11 files changed, 54 insertions(+), 41 deletions(-)

diff --git a/cpu-exec.c b/cpu-exec.c
index ea0e5b1..4d87742 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -261,27 +261,8 @@ int cpu_exec(CPUState *env1)
     env = env1;
 
     env_to_regs();
-#if defined(TARGET_I386)
-    /* put eflags in CPU temporary format */
-    CC_SRC = env->eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
-    DF = 1 - (2 * ((env->eflags >> 10) & 1));
-    CC_OP = CC_OP_EFLAGS;
-    env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
-#elif defined(TARGET_SPARC)
-#elif defined(TARGET_M68K)
-    env->cc_op = CC_OP_FLAGS;
-    env->cc_dest = env->sr & 0xf;
-    env->cc_x = (env->sr >> 4) & 1;
-#elif defined(TARGET_ALPHA)
-#elif defined(TARGET_ARM)
-#elif defined(TARGET_PPC)
-#elif defined(TARGET_MIPS)
-#elif defined(TARGET_SH4)
-#elif defined(TARGET_CRIS)
+    cpu_load_flags(env);
     /* XXXXX */
-#else
-#error unsupported target CPU
-#endif
     env->exception_index = -1;
 
     /* prepare setjmp context for exception handling */
@@ -623,27 +604,7 @@ int cpu_exec(CPUState *env1)
         }
     } /* for(;;) */
 
-
-#if defined(TARGET_I386)
-    /* restore flags in standard format */
-    env->eflags = env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
-#elif defined(TARGET_ARM)
-    /* XXX: Save/restore host fpu exception state?.  */
-#elif defined(TARGET_SPARC)
-#elif defined(TARGET_PPC)
-#elif defined(TARGET_M68K)
-    cpu_m68k_flush_flags(env, env->cc_op);
-    env->cc_op = CC_OP_FLAGS;
-    env->sr = (env->sr & 0xffe0)
-              | env->cc_dest | (env->cc_x << 4);
-#elif defined(TARGET_MIPS)
-#elif defined(TARGET_SH4)
-#elif defined(TARGET_ALPHA)
-#elif defined(TARGET_CRIS)
-    /* XXXXX */
-#else
-#error unsupported target CPU
-#endif
+    cpu_save_flags(env);
 
     /* restore global registers */
 #include "hostregs_helper.h"
diff --git a/exec-all.h b/exec-all.h
index eaf7c40..0c36c04 100644
--- a/exec-all.h
+++ b/exec-all.h
@@ -76,6 +76,7 @@ int cpu_restore_state_copy(struct TranslationBlock *tb,
                            void *puc);
 void cpu_resume_from_signal(CPUState *env1, void *puc);
 void cpu_exec_init(CPUState *env);
+
 int page_unprotect(target_ulong address, unsigned long pc, void *puc);
 void tb_invalidate_phys_page_range(target_phys_addr_t start, 
target_phys_addr_t end,
                                    int is_cpu_write_access);
diff --git a/target-alpha/exec.h b/target-alpha/exec.h
index 3b9754d..4824d0b 100644
--- a/target-alpha/exec.h
+++ b/target-alpha/exec.h
@@ -64,6 +64,9 @@ register uint64_t T2 asm(AREG3);
 #include "softmmu_exec.h"
 #endif /* !defined(CONFIG_USER_ONLY) */
 
+static inline void cpu_load_flags(CPUState *env) {}
+static inline void cpu_save_flags(CPUState *env) {}
+
 static always_inline void env_to_regs(void)
 {
 }
diff --git a/target-arm/exec.h b/target-arm/exec.h
index bd4910d..d52598c 100644
--- a/target-arm/exec.h
+++ b/target-arm/exec.h
@@ -37,6 +37,9 @@ static inline void regs_to_env(void)
 {
 }
 
+static inline void cpu_load_flags(CPUState *env) {}
+static inline void cpu_save_flags(CPUState *env) {}
+
 int cpu_arm_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
                               int mmu_idx, int is_softmmu);
 
diff --git a/target-cris/exec.h b/target-cris/exec.h
index fe63f16..38939ac 100644
--- a/target-cris/exec.h
+++ b/target-cris/exec.h
@@ -44,6 +44,9 @@ static inline void regs_to_env(void)
 {
 }
 
+static inline void cpu_load_flags(CPUState *env) {}
+static inline void cpu_save_flags(CPUState *env) {}
+
 int cpu_cris_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
                               int mmu_idx, int is_softmmu);
 void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr);
diff --git a/target-i386/exec.h b/target-i386/exec.h
index 90b82f3..c5cdbf9 100644
--- a/target-i386/exec.h
+++ b/target-i386/exec.h
@@ -58,6 +58,21 @@ extern int loglevel;
 #include "cpu.h"
 #include "exec-all.h"
 
+static inline void cpu_load_flags(CPUState *env)
+{
+    /* put eflags in CPU temporary format */
+    CC_SRC = env->eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
+    DF = 1 - (2 * ((env->eflags >> 10) & 1));
+    CC_OP = CC_OP_EFLAGS;
+    env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
+}
+
+static inline void cpu_save_flags(CPUState *env)
+{
+    /* restore flags in standard format */
+    env->eflags = env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
+}
+
 void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
 void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
 void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
diff --git a/target-m68k/exec.h b/target-m68k/exec.h
index 1269445..a19f18d 100644
--- a/target-m68k/exec.h
+++ b/target-m68k/exec.h
@@ -37,6 +37,21 @@ static inline void regs_to_env(void)
 {
 }
 
+static inline void cpu_load_flags(CPUState *env)
+{
+    env->cc_op = CC_OP_FLAGS;
+    env->cc_dest = env->sr & 0xf;
+    env->cc_x = (env->sr >> 4) & 1;
+}
+
+static inline void cpu_save_flags(CPUState *env)
+{
+    cpu_m68k_flush_flags(env, env->cc_op);
+    env->cc_op = CC_OP_FLAGS;
+    env->sr = (env->sr & 0xffe0)
+              | env->cc_dest | (env->cc_x << 4);
+}
+
 int cpu_m68k_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
                               int mmu_idx, int is_softmmu);
 
diff --git a/target-mips/exec.h b/target-mips/exec.h
index f10a35d..07b520b 100644
--- a/target-mips/exec.h
+++ b/target-mips/exec.h
@@ -44,6 +44,9 @@ register target_ulong T1 asm(AREG2);
 #include "cpu.h"
 #include "exec-all.h"
 
+static inline void cpu_load_flags(CPUState *env) {}
+static inline void cpu_save_flags(CPUState *env) {}
+
 #if !defined(CONFIG_USER_ONLY)
 #include "softmmu_exec.h"
 #endif /* !defined(CONFIG_USER_ONLY) */
diff --git a/target-ppc/exec.h b/target-ppc/exec.h
index 76fdb0b..67f33f4 100644
--- a/target-ppc/exec.h
+++ b/target-ppc/exec.h
@@ -27,6 +27,9 @@
 #include "cpu.h"
 #include "exec-all.h"
 
+static inline void cpu_load_flags(CPUState *env) {}
+static inline void cpu_save_flags(CPUState *env) {}
+
 /* For normal operations, precise emulation should not be needed */
 //#define USE_PRECISE_EMULATION 1
 #define USE_PRECISE_EMULATION 0
diff --git a/target-sh4/exec.h b/target-sh4/exec.h
index 2d33376..ae672ac 100644
--- a/target-sh4/exec.h
+++ b/target-sh4/exec.h
@@ -36,6 +36,9 @@ register uint32_t T1 asm(AREG2);
 #include "cpu.h"
 #include "exec-all.h"
 
+static inline void cpu_load_flags(CPUState *env) {}
+static inline void cpu_save_flags(CPUState *env) {}
+
 static inline int cpu_halted(CPUState *env) {
     if (!env->halted)
         return 0;
diff --git a/target-sparc/exec.h b/target-sparc/exec.h
index 3ca0afb..b53e9e3 100644
--- a/target-sparc/exec.h
+++ b/target-sparc/exec.h
@@ -24,6 +24,9 @@ static inline void regs_to_env(void)
 {
 }
 
+static inline void cpu_load_flags(CPUState *env) {}
+static inline void cpu_save_flags(CPUState *env) {}
+
 int cpu_sparc_handle_mmu_fault(CPUState *env1, target_ulong address, int rw,
                                int mmu_idx, int is_softmmu);
 void do_interrupt(CPUState *env);
-- 
1.5.4.5