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[Qemu-devel] [PATCH 4/6] use halted attribute for i386 too.


From: Glauber Costa
Subject: [Qemu-devel] [PATCH 4/6] use halted attribute for i386 too.
Date: Wed, 28 May 2008 11:01:34 -0300

Unlike other architectures, i386 lacked a "halted" attribute, going
with a flag into hflags. By using the halted attribute, we can make
the code look like more other architectures, and simplify the code in
some instances. In this commit, we make the code for info_cpus simpler
in monitor.c

Signed-off-by: Glauber Costa <address@hidden>
---
 cpu-defs.h            |    2 ++
 exec-all.h            |    4 ++++
 hw/apic.c             |    4 ++--
 hw/pc.c               |    2 +-
 monitor.c             |   23 +++++------------------
 target-alpha/cpu.h    |    1 -
 target-arm/cpu.h      |    1 -
 target-cris/cpu.h     |    1 -
 target-i386/exec.h    |    6 ++++--
 target-i386/helper.c  |    8 +++++++-
 target-m68k/cpu.h     |    1 -
 target-mips/cpu.h     |    2 --
 target-mips/exec.h    |    2 ++
 target-ppc/cpu.h      |    2 --
 target-ppc/exec.h     |    1 +
 target-ppc/helper.c   |    6 ++++++
 target-sh4/cpu.h      |    1 -
 target-sparc/cpu.h    |    1 -
 target-sparc/exec.h   |    2 ++
 target-sparc/helper.c |    6 ++++++
 20 files changed, 42 insertions(+), 34 deletions(-)

diff --git a/cpu-defs.h b/cpu-defs.h
index fe25703..bcfec91 100644
--- a/cpu-defs.h
+++ b/cpu-defs.h
@@ -163,6 +163,8 @@ typedef struct CPUTLBEntry {
     jmp_buf jmp_env;                                                    \
     int exception_index;                                                \
                                                                         \
+    int halted;                                                         \
+                                                                        \
     void *next_cpu; /* next CPU sharing TB cache */                     \
     int cpu_index; /* CPU index (informative) */                        \
     /* user data */                                                     \
diff --git a/exec-all.h b/exec-all.h
index 0eea2f1..9999761 100644
--- a/exec-all.h
+++ b/exec-all.h
@@ -92,6 +92,10 @@ void cpu_exec_init(CPUState *env);
 #define cpu_save_flags(env) do {} while (0)
 #endif
 
+#ifndef cpu_info_ip
+#define cpu_info_ip(env, buf) (0)
+#endif
+
 int page_unprotect(target_ulong address, unsigned long pc, void *puc);
 void tb_invalidate_phys_page_range(target_phys_addr_t start, 
target_phys_addr_t end,
                                    int is_cpu_write_access);
diff --git a/hw/apic.c b/hw/apic.c
index a1ebf21..0dc9f8e 100644
--- a/hw/apic.c
+++ b/hw/apic.c
@@ -443,12 +443,12 @@ static void apic_init_ipi(APICState *s)
 static void apic_startup(APICState *s, int vector_num)
 {
     CPUState *env = s->cpu_env;
-    if (!(env->hflags & HF_HALTED_MASK))
+    if (!(env->halted))
         return;
     env->eip = 0;
     cpu_x86_load_seg_cache(env, R_CS, vector_num << 8, vector_num << 12,
                            0xffff, 0);
-    env->hflags &= ~HF_HALTED_MASK;
+    env->halted = 0;
 }
 
 static void apic_deliver(APICState *s, uint8_t dest, uint8_t dest_mode,
diff --git a/hw/pc.c b/hw/pc.c
index c92384c..c68323b 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -761,7 +761,7 @@ static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
             exit(1);
         }
         if (i != 0)
-            env->hflags |= HF_HALTED_MASK;
+            env->halted = 1;
         if (smp_cpus > 1) {
             /* XXX: enable it in all cases */
             env->cpuid_features |= CPUID_APIC;
diff --git a/monitor.c b/monitor.c
index a0bf2ee..406f6d2 100644
--- a/monitor.c
+++ b/monitor.c
@@ -36,6 +36,8 @@
 #include "disas.h"
 #include <dirent.h>
 
+#include "exec-all.h"
+
 #ifdef CONFIG_PROFILER
 #include "qemu-timer.h" /* for ticks_per_sec */
 #endif
@@ -304,6 +306,7 @@ static void do_info_registers(void)
 static void do_info_cpus(void)
 {
     CPUState *env;
+    char buf[1024];
 
     /* just to set the default cpu if not already done */
     mon_get_cpu();
@@ -312,24 +315,8 @@ static void do_info_cpus(void)
         term_printf("%c CPU #%d:",
                     (env == mon_cpu) ? '*' : ' ',
                     env->cpu_index);
-#if defined(TARGET_I386)
-        term_printf(" pc=0x" TARGET_FMT_lx, env->eip + env->segs[R_CS].base);
-        if (env->hflags & HF_HALTED_MASK)
-            term_printf(" (halted)");
-#elif defined(TARGET_PPC)
-        term_printf(" nip=0x" TARGET_FMT_lx, env->nip);
-        if (env->halted)
-            term_printf(" (halted)");
-#elif defined(TARGET_SPARC)
-        term_printf(" pc=0x" TARGET_FMT_lx " npc=0x" TARGET_FMT_lx, env->pc, 
env->npc);
-        if (env->halted)
-            term_printf(" (halted)");
-#elif defined(TARGET_MIPS)
-        term_printf(" PC=0x" TARGET_FMT_lx, env->PC[env->current_tc]);
-        if (env->halted)
-            term_printf(" (halted)");
-#endif
-        term_printf("\n");
+        if (cpu_info_ip(env, buf))
+            term_printf("%s %s\n", buf, env->halted ? "(halted)" : "");
     }
 }
 
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index a71bed1..c955997 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -284,7 +284,6 @@ struct CPUAlphaState {
 
     int user_mode_only; /* user mode only simulation */
     uint32_t hflags;
-    int halted;
 
     int error_code;
     int interrupt_request;
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 60a7a64..8d0558c 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -158,7 +158,6 @@ typedef struct CPUARMState {
     /* exception/interrupt handling */
     int interrupt_request;
     int user_mode_only;
-    int halted;
 
     /* VFP coprocessor state.  */
     struct {
diff --git a/target-cris/cpu.h b/target-cris/cpu.h
index d45abea..acc1b5d 100644
--- a/target-cris/cpu.h
+++ b/target-cris/cpu.h
@@ -161,7 +161,6 @@ typedef struct CPUCRISState {
 
        int features;
        int user_mode_only;
-       int halted;
 
        CPU_COMMON
 } CPUCRISState;
diff --git a/target-i386/exec.h b/target-i386/exec.h
index 38ee96b..f2da292 100644
--- a/target-i386/exec.h
+++ b/target-i386/exec.h
@@ -46,6 +46,8 @@ do {
     env->eflags = env->eflags | cc_table[CC_OP].compute_all() | (DF & 
DF_MASK); \
 } while (0)
 
+#define cpu_info_ip x86_cpu_info_ip
+
 extern FILE *logfile;
 extern int loglevel;
 
@@ -400,13 +402,13 @@ static inline void regs_to_env(void)
 
 static inline int cpu_halted(CPUState *env) {
     /* handle exit of HALTED state */
-    if (!(env->hflags & HF_HALTED_MASK))
+    if (!(env->halted))
         return 0;
     /* disable halt condition */
     if (((env->interrupt_request & CPU_INTERRUPT_HARD) &&
          (env->eflags & IF_MASK)) ||
         (env->interrupt_request & CPU_INTERRUPT_NMI)) {
-        env->hflags &= ~HF_HALTED_MASK;
+        env->halted = 0;
         return 0;
     }
     return EXCP_HALTED;
diff --git a/target-i386/helper.c b/target-i386/helper.c
index cab085a..89c18ee 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -4550,7 +4550,7 @@ void helper_idivq_EAX(target_ulong t0)
 void helper_hlt(void)
 {
     env->hflags &= ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before */
-    env->hflags |= HF_HALTED_MASK;
+    env->halted = 1;
     env->exception_index = EXCP_HLT;
     cpu_loop_exit();
 }
@@ -4727,6 +4727,12 @@ void helper_clgi(void)
     env->hflags &= ~HF_GIF_MASK;
 }
 
+int x86_cpu_info_ip(CPUState *env, char *buf)
+{
+    sprintf(buf, " pc=0x" TARGET_FMT_lx, env->eip + env->segs[R_CS].base);
+    return 1;
+}
+
 #if defined(CONFIG_USER_ONLY)
 
 void helper_vmrun(void) 
diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h
index 82d7558..d5c5a10 100644
--- a/target-m68k/cpu.h
+++ b/target-m68k/cpu.h
@@ -106,7 +106,6 @@ typedef struct CPUM68KState {
     /* exception/interrupt handling */
     int interrupt_request;
     int user_mode_only;
-    uint32_t halted;
 
     int pending_vector;
     int pending_level;
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index cf1d7aa..51bafe7 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -446,8 +446,6 @@ struct CPUMIPSState {
     target_ulong btarget;        /* Jump / branch target               */
     int bcond;                   /* Branch condition (if needed)       */
 
-    int halted; /* TRUE if the CPU is in suspend state */
-
     int SYNCI_Step; /* Address step size for SYNCI */
     int CCRes; /* Cycle count resolution/divisor */
     uint32_t CP0_Status_rw_bitmask; /* Read/write bits in CP0_Status */
diff --git a/target-mips/exec.h b/target-mips/exec.h
index f10a35d..35fbb11 100644
--- a/target-mips/exec.h
+++ b/target-mips/exec.h
@@ -41,6 +41,8 @@ register target_ulong T1 asm(AREG2);
 #define WTH2 (env->fpu->ft2.w[!FP_ENDIAN_IDX])
 #endif
 
+#define cpu_info_ip mips_cpu_info_ip
+
 #include "cpu.h"
 #include "exec-all.h"
 
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index b3dcc73..a884fd6 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -586,8 +586,6 @@ struct CPUPPCState {
 
     CPU_COMMON
 
-    int halted; /* TRUE if the CPU is in suspend state */
-
     int access_type; /* when a memory exception occurs, the access
                         type is stored here */
 
diff --git a/target-ppc/exec.h b/target-ppc/exec.h
index 76fdb0b..fd07349 100644
--- a/target-ppc/exec.h
+++ b/target-ppc/exec.h
@@ -24,6 +24,7 @@
 
 #include "dyngen-exec.h"
 
+#define cpu_info_ip ppc_cpu_info_ip
 #include "cpu.h"
 #include "exec-all.h"
 
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index 2a52dc6..2f83438 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -2988,3 +2988,9 @@ void cpu_ppc_close (CPUPPCState *env)
     /* Should also remove all opcode tables... */
     qemu_free(env);
 }
+
+int ppc_cpu_info_ip(CPUState *env, char *buf)
+{
+    sprintf(buf, " nip=0x" TARGET_FMT_lx, env->nip);
+    return 1;
+}
diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
index 534ada3..c03cdb1 100644
--- a/target-sh4/cpu.h
+++ b/target-sh4/cpu.h
@@ -116,7 +116,6 @@ typedef struct CPUSH4State {
 
     int user_mode_only;
     int interrupt_request;
-    int halted;
      CPU_COMMON tlb_t utlb[UTLB_SIZE]; /* unified translation table */
     tlb_t itlb[ITLB_SIZE];     /* instruction translation table */
     void *intc_handle;
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index b663fe2..ba3ee01 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -217,7 +217,6 @@ typedef struct CPUSPARCState {
     int user_mode_only;
     int interrupt_index;
     int interrupt_request;
-    int halted;
     uint32_t mmu_bm;
     uint32_t mmu_ctpr_mask;
     uint32_t mmu_cxr_mask;
diff --git a/target-sparc/exec.h b/target-sparc/exec.h
index 3ef0cf9..cf51280 100644
--- a/target-sparc/exec.h
+++ b/target-sparc/exec.h
@@ -13,6 +13,8 @@ register struct CPUSPARCState *env asm(AREG0);
 #define QT0 (env->qt0)
 #define QT1 (env->qt1)
 
+#define cpu_info_ip sparc_cpu_info_ip
+
 #include "cpu.h"
 #include "exec-all.h"
 
diff --git a/target-sparc/helper.c b/target-sparc/helper.c
index 8bf40e4..78a3fe5 100644
--- a/target-sparc/helper.c
+++ b/target-sparc/helper.c
@@ -1525,6 +1525,12 @@ void cpu_dump_state(CPUState *env, FILE *f,
     cpu_fprintf(f, "fsr: 0x%08x\n", GET_FSR32(env));
 }
 
+int sparc_cpu_info_ip(CPUState *env, char *buf)
+{
+    sprintf(buf, " pc=0x" TARGET_FMT_lx " npc=0x" TARGET_FMT_lx, env->pc, 
env->npc);
+    return 1;
+}
+
 #ifdef TARGET_SPARC64
 #if !defined(CONFIG_USER_ONLY)
 #include "qemu-common.h"
-- 
1.5.4.5





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