qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [PATCH] sparc32 boot mode flag fix


From: Blue Swirl
Subject: Re: [Qemu-devel] [PATCH] sparc32 boot mode flag fix
Date: Tue, 6 Nov 2007 21:31:37 +0200

On 11/6/07, Robert Reif <address@hidden> wrote:
> This patch adds CPU dependent boot mode flag support.
>
> Different CPUs use different bits for the boot mode flag.  The constant
> MMU_BM is replaced with a variable which is set for the selected CPU.

Nice. I have a patch for OpenBIOS to fix setting of the boot flag in
the exception handler. It's not used except for crashes.

> This patch also removes the MMU flags from being saved in the
> translation block code as a result of an off line discussion with Paul
> Brook.

I'd like to hear the reasoning behind that. The TBs generated while in
boot mode and MMU disabled may contain translations generated from
virtual to physical mappings that do not exist when the mode is
changed. Boot mode and MMU disable are not used after boot and these
bits don't affect translation, so those bits may be less important and
not worth the few bits in TB flags.

No-fault mode is used by Linux to store user register windows forcibly
to user stack. This happens often.

Looks like this part works, but I'm not sure this is a correct
solution. I'd like to get rid of the TLB flushing when MMU flags
change to support the hardware contexts better, this change would rely
on that heavily. There is also a long standing problem: system_reset
in a SMP system crashes and I suspect this area.

> This patch also performs a CPU reset after the CPU is registered rather
> than before.

Why is this change needed?

> This patch has successfully booted the debian installer and the initrd
> kernel
> in sparc-test successfully for both an ss5 and ss10.  It also makes running
> an ss10 openboot rom image behave a little better.

It also passes my tests and the patch looks OK for me, except for the
questions above.




reply via email to

[Prev in Thread] Current Thread [Next in Thread]