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Re: [Qemu-devel] Mips 64 emulation not compiling
From: |
Thiemo Seufer |
Subject: |
Re: [Qemu-devel] Mips 64 emulation not compiling |
Date: |
Sat, 27 Oct 2007 12:19:39 +0100 |
User-agent: |
Mutt/1.5.16 (2007-06-11) |
J. Mayer wrote:
> The latest patches in clo makes gcc 3.4.6 fail to build the mips64
> targets on my amd64 host (looks like an register allocation clash in the
> optimizer code).
Your version is likely faster as well.
> Furthermore, the clz micro-op for Mips seems very suspect to me,
> according to the changes made in the clo implementation.
It is correct, the sign-extension are zero in that case.
> I did change the clz / clo implementation to use the same code as the
> one used for the PowerPC implementation. It seems to me that the result
> would be correct... And it compiles...
>
> Please take a look to the folowing patch:
We have now clz/clo in several places, so I expanded your patch a
bit. For now it is only used for the mips target. Comments?
Thiemo
Index: qemu-work/host-utils.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ qemu-work/host-utils.h 2007-10-27 12:13:30.000000000 +0100
@@ -0,0 +1,104 @@
+/*
+ * Utility compute operations used by translated code.
+ *
+ * Copyright (c) 2007 Thiemo Seufer
+ * Copyright (c) 2007 Jocelyn Mayer
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+/* Note that some of those functions may end up calling libgcc functions,
+ depending on the host machine. It is up to the target emulation to
+ cope with that. */
+
+/* Binary search for leading zeros. */
+
+static always_inline int clz32(uint32_t val)
+{
+ int cnt = 0;
+
+ if (!(val & 0xFFFF0000U)) {
+ cnt += 16;
+ val <<= 16;
+ }
+ if (!(val & 0xFF000000U)) {
+ cnt += 8;
+ val <<= 8;
+ }
+ if (!(val & 0xF0000000U)) {
+ cnt += 4;
+ val <<= 4;
+ }
+ if (!(val & 0xC0000000U)) {
+ cnt += 2;
+ val <<= 2;
+ }
+ if (!(val & 0x80000000U)) {
+ cnt++;
+ val <<= 1;
+ }
+ if (!(val & 0x80000000U)) {
+ cnt++;
+ }
+ return cnt;
+}
+
+static always_inline int clo32(uint32_t val)
+{
+ return clz32(~val);
+}
+
+static always_inline int clz64(uint64_t val)
+{
+ int cnt = 0;
+
+ if (!(val & 0xFFFFFFFF00000000ULL)) {
+ cnt += 32;
+ val <<= 32;
+ }
+ if (!(val & 0xFFFF000000000000ULL)) {
+ cnt += 16;
+ val <<= 16;
+ }
+ if (!(val & 0xFF00000000000000ULL)) {
+ cnt += 8;
+ val <<= 8;
+ }
+ if (!(val & 0xF000000000000000ULL)) {
+ cnt += 4;
+ val <<= 4;
+ }
+ if (!(val & 0xC000000000000000ULL)) {
+ cnt += 2;
+ val <<= 2;
+ }
+ if (!(val & 0x8000000000000000ULL)) {
+ cnt++;
+ val <<= 1;
+ }
+ if (!(val & 0x8000000000000000ULL)) {
+ cnt++;
+ }
+ return cnt;
+}
+
+static always_inline int clo64(uint64_t val)
+{
+ return clz64(~val);
+}
Index: qemu-work/target-mips/exec.h
===================================================================
--- qemu-work.orig/target-mips/exec.h 2007-10-26 22:42:15.000000000 +0100
+++ qemu-work/target-mips/exec.h 2007-10-27 12:13:30.000000000 +0100
@@ -70,6 +70,8 @@
void do_dsrav (void);
void do_dsrlv (void);
void do_drotrv (void);
+void do_dclo (void);
+void do_dclz (void);
#endif
#endif
Index: qemu-work/target-mips/op.c
===================================================================
--- qemu-work.orig/target-mips/op.c 2007-10-26 22:42:14.000000000 +0100
+++ qemu-work/target-mips/op.c 2007-10-27 12:13:30.000000000 +0100
@@ -22,6 +22,7 @@
#include "config.h"
#include "exec.h"
+#include "host-utils.h"
#ifndef CALL_FROM_TB0
#define CALL_FROM_TB0(func) func()
@@ -537,35 +538,13 @@
void op_clo (void)
{
- int n;
-
- if (T0 == ~((target_ulong)0)) {
- T0 = 32;
- } else {
- for (n = 0; n < 32; n++) {
- if (!(((int32_t)T0) & (1 << 31)))
- break;
- T0 <<= 1;
- }
- T0 = n;
- }
+ T0 = clo32(T0);
RETURN();
}
void op_clz (void)
{
- int n;
-
- if (T0 == 0) {
- T0 = 32;
- } else {
- for (n = 0; n < 32; n++) {
- if (T0 & (1 << 31))
- break;
- T0 <<= 1;
- }
- T0 = n;
- }
+ T0 = clz32(T0);
RETURN();
}
@@ -645,6 +624,18 @@
RETURN();
}
+void op_dclo (void)
+{
+ CALL_FROM_TB0(do_dclo);
+ RETURN();
+}
+
+void op_dclz (void)
+{
+ CALL_FROM_TB0(do_dclz);
+ RETURN();
+}
+
#else /* TARGET_LONG_BITS > HOST_LONG_BITS */
void op_dsll (void)
@@ -735,41 +726,19 @@
T0 = T1;
RETURN();
}
-#endif /* TARGET_LONG_BITS > HOST_LONG_BITS */
void op_dclo (void)
{
- int n;
-
- if (T0 == ~((target_ulong)0)) {
- T0 = 64;
- } else {
- for (n = 0; n < 64; n++) {
- if (!(T0 & (1ULL << 63)))
- break;
- T0 <<= 1;
- }
- T0 = n;
- }
+ T0 = clo64(T0);
RETURN();
}
void op_dclz (void)
{
- int n;
-
- if (T0 == 0) {
- T0 = 64;
- } else {
- for (n = 0; n < 64; n++) {
- if (T0 & (1ULL << 63))
- break;
- T0 <<= 1;
- }
- T0 = n;
- }
+ T0 = clz64(T0);
RETURN();
}
+#endif /* TARGET_LONG_BITS > HOST_LONG_BITS */
#endif /* TARGET_MIPSN32 || TARGET_MIPS64 */
/* 64 bits arithmetic */
Index: qemu-work/target-mips/op_helper.c
===================================================================
--- qemu-work.orig/target-mips/op_helper.c 2007-10-26 22:42:15.000000000
+0100
+++ qemu-work/target-mips/op_helper.c 2007-10-27 12:13:30.000000000 +0100
@@ -20,6 +20,8 @@
#include <stdlib.h>
#include "exec.h"
+#include "host-utils.h"
+
#define GETPC() (__builtin_return_address(0))
/*****************************************************************************/
@@ -141,6 +143,17 @@
} else
T0 = T1;
}
+
+void do_dclo (void)
+{
+ T0 = clo64(T0);
+}
+
+void do_dclz (void)
+{
+ T0 = clz64(T0);
+}
+
#endif /* TARGET_LONG_BITS > HOST_LONG_BITS */
#endif /* TARGET_MIPSN32 || TARGET_MIPS64 */