Re: [Qemu-devel] [PATCH] Choose emulated MIPS CPU at runtime

[Stefan Weil]

Thiemo Seufer schrieb:
> Stefan Weil wrote:
>> There exists also an older 4KEc version which only supports
>>
>> MIPS32R1. AR7 (a SoC from TI) is based on this older version.
> This can't be correct. 4KEc is defined as a MIPS32R2 core by MIPS
> Technologies. A MIPS32R1 4KEc would be redundant since that's what
> the 4Kc is.
Until last week, I had the same opinion. Documentation says
that AR7 is based on 4KEc, 4KEc is MIPS32R2, so I compiled Linux
using MIPS32R2 settings. It crashed.

Then I detected this extract from the Linux source code (2.6.20):

./include/asm-mips/cpu.h:#define PRID_IMP_4KEC          0x8400
./include/asm-mips/cpu.h:#define PRID_IMP_4KECR2        0x9000

So Linux knows two variants of 4KEc!
And AR7 has CP0_PRid == 0x00018448 - the first variant without "R2"!

Perhaps some readers of the list have more information?
>> I noticed this because some code using DI worked well with QEMU,
>> but my AR7 based DSL router crashed...
> Did it die with an RI exception? If not then it sounds more like
> a missing ehb barrier. Qemu doesn't emulate pipeline hazards...
The Linux code was ehb, then di. It crashed at the di statement.
The kernel did not show the reason for the crash, and I have
neither kgdb nor a hardware debugger for my router...
>> AR7, it would be nice to switch between MIPS32R1 / MIPS32R2
>> instruction sets.
>
> It would be nice to see a AR7 router emulation as a separate
> machine type in Qemu. *hint* *hint* :-)
I agree. The URL of the AR7 emulation code was published earlier on
this list. It has grown to more than 100 KB, so I don't
want to send it as a mail appendix to the list.
May I send you a patch for integration? Are there any special
requirements for this kind of patch to get acceptance?

Stefan