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Re: [Qemu-devel] [PATCH] SPARC target : Fix carry flagupdate inaddxcc an
From: |
Blue Swirl |
Subject: |
Re: [Qemu-devel] [PATCH] SPARC target : Fix carry flagupdate inaddxcc and subxc |
Date: |
Fri, 14 Apr 2006 09:01:25 +0200 |
Conclusion : the computation of the V flag in qemu is correct, and their is
no special case to consider if the C flag is set or not :-)
For tomorrow, the formal proof of the correctness of the whole qemu code
;-)
Thanks for the superb analysis!
Now it's time to check if real hardware works according to theory.
In this addition, there is a carry from lower 32 bits as well as sign
change:
./addx -1 0x7fffffff 1 0
7fffffffffffffff + 1 = 8000000000000000, NZVC: 10
qemu-sparc ./addx -1 0x7fffffff 1 0
7fffffffffffffff + 1 = 8000000000000000, NZVC: 10
Here, no carry:
./addx -1 0x7fffffff 0 1
7fffffffffffffff + 100000000 = 80000000ffffffff, NZVC: 10
qemu-sparc ./addx -1 0x7fffffff 0 1
7fffffffffffffff + 100000000 = 80000000ffffffff, NZVC: 10
Another case:
./addx 0 0x80000000 0 0x80000000
8000000000000000 + 8000000000000000 = 0, NZVC: 7
qemu-sparc ./addx 0 0x80000000 0 0x80000000
8000000000000000 + 8000000000000000 = 0, NZVC: 7
Looks fine to me. There was a sign extension problem in the test program,
fixed version attached.
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addx.c
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