Re: [Qemu-devel] [PATCH] SPARC target : Fix carry flag update inaddxcc and subxc

[Even Rouault]

To be clear, I just ran into the problem of the update of the carry flag but 
I'm not at all a specialist of SPARC assembly.

From what I've understood, Paul is certainly right when suggesting to add a 
fix for the SPARC64 case (for the addxcc and subxcc, not addx and subx) and I 
send a new version of the patch (qemu-sparc-carry-xcc-2.patch)
I've also tried to take into account Blue Swirl's suggestion of storing the 
intermediate results of the addition T0 + FLAG_SET(PSR_CARRY), but the result 
wasn't correct in all cases (specifically if T0=0xFFFFFFFF). I think we 
really need a '<' and '<=' comparison. 
However, I've tried to refactor a bit the code to save some comparisons in 
another version of the patch (qemu-sparc-carry-xcc-3.patch), really close to 
the arm code, and hopefully equivalent to qemu-sparc-carry-xcc-2.patch (but 
less sexy).

As far as the V flag is concerned, mmm, I'm not really sure whether we should 
change something in the sparc code. If we compare to the arm code, we don't 
take into account the fact that the carry flag is set before.

We'd probably need some extensive tests and their associated expected results.

Even

Le Lundi 10 Avril 2006 20:46, Laurent Desnogues a écrit :
> Blue Swirl a écrit :
> >> Doesn't this condition in addx and the corresponding line in subx need
> >> similar
> >> treatment?
> >
> > They don't change the flags.
>
> ADDX (now named ADDC in v9) doesn't change the flags, while ADDXcc
> (ADDCcc) does.  The cc versions also compute overflow.
>
> cf. SPARC v9 on www.sparg.org
>
>
>                       Laurent
>
>
>
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qemu-sparc-carry-xcc-ops-3.patch
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qemu-sparc-carry-xcc-ops-2.patch
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