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Re: [Qemu-devel] [patch] option -no-tsc for i386 with speedstep
From: |
Kyle Hayes |
Subject: |
Re: [Qemu-devel] [patch] option -no-tsc for i386 with speedstep |
Date: |
Mon, 25 Apr 2005 20:03:01 -0700 |
User-agent: |
KMail/1.7.2 |
On Monday 25 April 2005 04:15, Massimo Dal Zotto wrote:
> When qemu runs on an i386 cpu with speedstep enabled the clock of the
> guest os is not in sync with the clock on the host os because the
> vm_timer used for irq 0 generates interrupts at wrong rate when
> the host cpu frequency changes.
>
> The problem is that the vm_timer uses the rdtsc instruction and the
> value of ticks_per_sec, computed at start time, for calculating the
> expire time of vm_timers. While ticks_per_sec is constant the values
> returned by rdtsc are dependent on the current cpu clock, which is not
> constant if speedstep is used.
There is a discussion about this problem on either x86-secret.com or
Sudhian. I can't remember which :-( In the latest series of P4 chips
(both Xeon and desktop I think), the counter used for the rdtsc
instruction stays at the same frequency while the rest of the CPU changes.
This led to some "interesting" results with programs like CPU-Z.
Intel's response was that they now hold the counter at a stable frequency
so that this works. Unfortunately, there are years of processors which do
not do that, so other workarounds must be done.
Best,
Kyle
- Re: [Qemu-devel] [patch] option -no-tsc for i386 with speedstep, (continued)
Re: [Qemu-devel] [patch] option -no-tsc for i386 with speedstep,
Kyle Hayes <=