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Re: [Qemu-devel] Sparc system patch 12
From: |
Antony T Curtis |
Subject: |
Re: [Qemu-devel] Sparc system patch 12 |
Date: |
Sat, 30 Oct 2004 10:03:20 +0100 |
On Fri, 2004-10-29 at 20:25, Blue Swirl wrote:
> Hi,
>
> I looked at the data sheets of the both chips and your driver. Good news is
> that all the 16-bit data structures used in Sparc are implemented in your
> driver. Bad news is that the endianness bit (CSR3 BSWP) is not implemented
> in either driver, and both assume different endianness.
Since QEMU dynamically translates code, is it that important for the
endianness bit as it only affects the device registers?
> Then there is Sparc-specific I/O MMU, which translates device virtual
> addresses issued by the DMA controller to physical ones. It needs to fix all
> memory accesses, but this is easy.
>
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--
Antony T Curtis, BSc. UNIX, Linux, *BSD, Networking
address@hidden C++, J2EE, Perl, MySQL, Apache
IT Consultancy.