Re: [Qemu-devel] Inquiry, speed comparison on OS X, QEMU vs Virtual PC

[J. Mayer]

Le 9 juil. 04, à 22:07, Natalia Portillo a écrit :
> 
> > I think that including support for the PowerPC swapping instructions 
> > in QEMU
> > will break compatibility with host PowerPCs before G3, so that 
> > instructions
> > should be used in a run-time capability detection scheme.
> >

On Sat, 2004-07-10 at 14:47, Pierre d'Herbemont wrote:
> Which PowerPC Implementations? According to The PowerPC Architecture 
> Book, all the implementation 601,603,604,620 should include support for 
> the lwbrx and stwbrx instructions.

I think all PPC include those instructions and gcc already uses them for
endian-swapping.
It seems to me that the feature which is discussed here is the presence
of IE bit in the machine state register.
I don't think using this bit could improve performances a lot. Because
there is only one bit to control the CPU and because most of the
problems are already solved using brx load and stores.
You would need to patch the kernel to use this bit (if it exists) and
need kernel calls when you ever want to change the access mode, which
seems not so great.

What could be more benefic would be a feature which exists in the PPC
405: one can define a memory area using big or little endian accesses.
But this seems to be very specific to the 405 and, once again, the win
would not be spectacular, imho.

-- 
J. Mayer <address@hidden>
Never organized