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[Qemu-commits] [qemu/qemu] 4f6754: xen/pt: reserve PCI slot 2 for Intel
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From: |
Peter Maydell |
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Subject: |
[Qemu-commits] [qemu/qemu] 4f6754: xen/pt: reserve PCI slot 2 for Intel igd-passthru |
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Date: |
Tue, 07 Mar 2023 04:41:31 -0800 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 4f67543bb8c5b031c2ad3785c1a2f3c255d72b25
https://github.com/qemu/qemu/commit/4f67543bb8c5b031c2ad3785c1a2f3c255d72b25
Author: Chuck Zmudzinski <brchuckz@aol.com>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M hw/i386/pc_piix.c
M hw/xen/xen_pt.c
M hw/xen/xen_pt.h
M hw/xen/xen_pt_stub.c
Log Message:
-----------
xen/pt: reserve PCI slot 2 for Intel igd-passthru
Intel specifies that the Intel IGD must occupy slot 2 on the PCI bus,
as noted in docs/igd-assign.txt in the Qemu source code.
Currently, when the xl toolstack is used to configure a Xen HVM guest with
Intel IGD passthrough to the guest with the Qemu upstream device model,
a Qemu emulated PCI device will occupy slot 2 and the Intel IGD will occupy
a different slot. This problem often prevents the guest from booting.
The only available workarounds are not good: Configure Xen HVM guests to
use the old and no longer maintained Qemu traditional device model
available from xenbits.xen.org which does reserve slot 2 for the Intel
IGD or use the "pc" machine type instead of the "xenfv" machine type and
add the xen platform device at slot 3 using a command line option
instead of patching qemu to fix the "xenfv" machine type directly. The
second workaround causes some degredation in startup performance such as
a longer boot time and reduced resolution of the grub menu that is
displayed on the monitor. This patch avoids that reduced startup
performance when using the Qemu upstream device model for Xen HVM guests
configured with the igd-passthru=on option.
To implement this feature in the Qemu upstream device model for Xen HVM
guests, introduce the following new functions, types, and macros:
* XEN_PT_DEVICE_CLASS declaration, based on the existing TYPE_XEN_PT_DEVICE
* XEN_PT_DEVICE_GET_CLASS macro helper function for XEN_PT_DEVICE_CLASS
* typedef XenPTQdevRealize function pointer
* XEN_PCI_IGD_SLOT_MASK, the value of slot_reserved_mask to reserve slot 2
* xen_igd_reserve_slot and xen_igd_clear_slot functions
Michael Tsirkin:
* Introduce XEN_PCI_IGD_DOMAIN, XEN_PCI_IGD_BUS, XEN_PCI_IGD_DEV, and
XEN_PCI_IGD_FN - use them to compute the value of XEN_PCI_IGD_SLOT_MASK
The new xen_igd_reserve_slot function uses the existing slot_reserved_mask
member of PCIBus to reserve PCI slot 2 for Xen HVM guests configured using
the xl toolstack with the gfx_passthru option enabled, which sets the
igd-passthru=on option to Qemu for the Xen HVM machine type.
The new xen_igd_reserve_slot function also needs to be implemented in
hw/xen/xen_pt_stub.c to prevent FTBFS during the link stage for the case
when Qemu is configured with --enable-xen and --disable-xen-pci-passthrough,
in which case it does nothing.
The new xen_igd_clear_slot function overrides qdev->realize of the parent
PCI device class to enable the Intel IGD to occupy slot 2 on the PCI bus
since slot 2 was reserved by xen_igd_reserve_slot when the PCI bus was
created in hw/i386/pc_piix.c for the case when igd-passthru=on.
Move the call to xen_host_pci_device_get, and the associated error
handling, from xen_pt_realize to the new xen_igd_clear_slot function to
initialize the device class and vendor values which enables the checks for
the Intel IGD to succeed. The verification that the host device is an
Intel IGD to be passed through is done by checking the domain, bus, slot,
and function values as well as by checking that gfx_passthru is enabled,
the device class is VGA, and the device vendor in Intel.
Signed-off-by: Chuck Zmudzinski <brchuckz@aol.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Message-Id:
<b1b4a21fe9a600b1322742dda55a40e9961daa57.1674346505.git.brchuckz@aol.com>
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
Commit: 3856734d80fbf46683e4080117ed961f5ab1300b
https://github.com/qemu/qemu/commit/3856734d80fbf46683e4080117ed961f5ab1300b
Author: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M hw/xen/xen_pt_config_init.c
Log Message:
-----------
hw/xen/xen_pt: fix uninitialized variable
xen_pt_config_reg_init() reads only that many bytes as the size of the
register that is being initialized. It uses
xen_host_pci_get_{byte,word,long} and casts its last argument to
expected pointer type. This means for smaller registers higher bits of
'val' are not initialized. Then, the function fails if any of those
higher bits are set.
Fix this by initializing 'val' with zero.
Signed-off-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Message-Id: <20230127050815.4155276-1-marmarek@invisiblethingslab.com>
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
Commit: 963a6b91c230ed292530e2009ac11b6515a198ed
https://github.com/qemu/qemu/commit/963a6b91c230ed292530e2009ac11b6515a198ed
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M target/arm/gdbstub.c
M target/arm/gdbstub64.c
M target/arm/internals.h
Log Message:
-----------
target/arm: Normalize aarch64 gdbstub get/set function names
Make the form of the function names between fp and sve the same:
- arm_gdb_*_svereg -> aarch64_gdb_*_sve_reg.
- aarch64_fpu_gdb_*_reg -> aarch64_gdb_*_fpu_reg.
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230227213329.793795-2-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 4bce95b45ec0f12790bdb3036eb1137f65822ff9
https://github.com/qemu/qemu/commit/4bce95b45ec0f12790bdb3036eb1137f65822ff9
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M target/arm/cpu.h
M target/arm/gdbstub.c
Log Message:
-----------
target/arm: Unexport arm_gen_dynamic_sysreg_xml
This function is not used outside gdbstub.c.
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230227213329.793795-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: e03aba8853bdafdd27c38a85dafb84b0edbeaf54
https://github.com/qemu/qemu/commit/e03aba8853bdafdd27c38a85dafb84b0edbeaf54
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M target/arm/cpu.h
M target/arm/gdbstub.c
M target/arm/gdbstub64.c
M target/arm/internals.h
Log Message:
-----------
target/arm: Move arm_gen_dynamic_svereg_xml to gdbstub64.c
The function is only used for aarch64, so move it to the
file that has the other aarch64 gdbstub stuff. Move the
declaration to internals.h.
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230227213329.793795-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: f214bdde5a65ac24626a63040ca899b6860c0ed6
https://github.com/qemu/qemu/commit/f214bdde5a65ac24626a63040ca899b6860c0ed6
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M target/arm/gdbstub64.c
Log Message:
-----------
target/arm: Split out output_vector_union_type
Create a subroutine for creating the union of unions
of the various type sizes that a vector may contain.
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230227213329.793795-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: a1ad913da0cb85239309cae93b7a1bf83ad3e1e5
https://github.com/qemu/qemu/commit/a1ad913da0cb85239309cae93b7a1bf83ad3e1e5
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M target/arm/gdbstub64.c
Log Message:
-----------
target/arm: Simplify register counting in arm_gen_dynamic_svereg_xml
Rather than increment base_reg and num, compute num from the change
to base_reg at the end. Clean up some nearby comments.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230227213329.793795-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 5cd5fa756e177cb293d44e02b5f6194f83c528bb
https://github.com/qemu/qemu/commit/5cd5fa756e177cb293d44e02b5f6194f83c528bb
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M target/arm/gdbstub64.c
Log Message:
-----------
target/arm: Hoist pred_width in arm_gen_dynamic_svereg_xml
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230227213329.793795-7-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: fdfb214cf05a186e573fc337972d5b169edc942a
https://github.com/qemu/qemu/commit/fdfb214cf05a186e573fc337972d5b169edc942a
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M target/arm/gdbstub64.c
Log Message:
-----------
target/arm: Fix svep width in arm_gen_dynamic_svereg_xml
Define svep based on the size of the predicates,
not the primary vector registers.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230227213329.793795-8-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 41c9ad8fb4641d812309b8f75329a74aa7397fc9
https://github.com/qemu/qemu/commit/41c9ad8fb4641d812309b8f75329a74aa7397fc9
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M target/arm/gdbstub64.c
Log Message:
-----------
target/arm: Add name argument to output_vector_union_type
This will make the function usable between SVE and SME.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230227213329.793795-9-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 55f0fc61f8a386dbadecec6aa0ab442df5f12e4d
https://github.com/qemu/qemu/commit/55f0fc61f8a386dbadecec6aa0ab442df5f12e4d
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M target/arm/gdbstub64.c
Log Message:
-----------
target/arm: Simplify iteration over bit widths
Order suf[] by the log8 of the width.
Use ARRAY_SIZE instead of hard-coding 128.
This changes the order of the union definitions,
but retains the order of the union-of-union members.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230227213329.793795-10-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: abf1f1b03aad07d9b7aa4bb5b06ac5a2c7b134d1
https://github.com/qemu/qemu/commit/abf1f1b03aad07d9b7aa4bb5b06ac5a2c7b134d1
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M target/arm/internals.h
M target/arm/tcg/pauth_helper.c
Log Message:
-----------
target/arm: Create pauth_ptr_mask
Keep the logic for pauth within pauth_helper.c, and expose
a helper function for use with the gdbstub pac extension.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230227213329.793795-11-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: e995d5cce4a022afc4624471cafd2e4eb72962e6
https://github.com/qemu/qemu/commit/e995d5cce4a022afc4624471cafd2e4eb72962e6
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M configs/targets/aarch64-linux-user.mak
M configs/targets/aarch64-softmmu.mak
M configs/targets/aarch64_be-linux-user.mak
A gdb-xml/aarch64-pauth.xml
M target/arm/gdbstub.c
M target/arm/gdbstub64.c
M target/arm/internals.h
Log Message:
-----------
target/arm: Implement gdbstub pauth extension
The extension is primarily defined by the Linux kernel NT_ARM_PAC_MASK
ptrace register set.
The original gdb feature consists of two masks, data and code, which are
used to mask out the authentication code within a pointer. Following
discussion with Luis Machado, add two more masks in order to support
pointers within the high half of the address space (i.e. TTBR1 vs TTBR0).
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1105
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230227213329.793795-12-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 48688c94418590585c05faed6fd7abb3296bf686
https://github.com/qemu/qemu/commit/48688c94418590585c05faed6fd7abb3296bf686
Author: David Reiss <dreiss@meta.com>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M target/arm/internals.h
M target/arm/tcg/m_helper.c
Log Message:
-----------
target/arm: Export arm_v7m_mrs_control
Allow the function to be used outside of m_helper.c.
Rename with an "arm_" prefix.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: David Reiss <dreiss@meta.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230227213329.793795-13-richard.henderson@linaro.org
[rth: Split out of a larger patch]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 6c8676512f347cc6c3d89bed45540df08fb2b4ef
https://github.com/qemu/qemu/commit/6c8676512f347cc6c3d89bed45540df08fb2b4ef
Author: David Reiss <dreiss@meta.com>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M target/arm/internals.h
M target/arm/tcg/m_helper.c
Log Message:
-----------
target/arm: Export arm_v7m_get_sp_ptr
Allow the function to be used outside of m_helper.c.
Move to be outside of ifndef CONFIG_USER_ONLY block.
Rename from get_v7m_sp_ptr.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: David Reiss <dreiss@meta.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230227213329.793795-14-richard.henderson@linaro.org
[rth: Split out of a larger patch]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 7d8b28b8b5d9d1b68d27b4f5a0329d114b5ce2ee
https://github.com/qemu/qemu/commit/7d8b28b8b5d9d1b68d27b4f5a0329d114b5ce2ee
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M target/arm/cpu.h
M target/arm/gdbstub.c
Log Message:
-----------
target/arm: Implement gdbstub m-profile systemreg and secext
The upstream gdb xml only implements {MSP,PSP}{,_NS,S}, but
go ahead and implement the other system registers as well.
Since there is significant overlap between the two, implement
them with common code. The only exception is the systemreg
view of CONTROL, which merges the banked bits as per MRS.
Signed-off-by: David Reiss <dreiss@meta.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230227213329.793795-15-richard.henderson@linaro.org
[rth: Substatial rewrite using enumerator and shared code.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 9094f9551df849f68d40236092d8af3ed869d093
https://github.com/qemu/qemu/commit/9094f9551df849f68d40236092d8af3ed869d093
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M target/arm/cpu.h
Log Message:
-----------
target/arm: Handle m-profile in arm_is_secure
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1421
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230227225832.816605-2-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: a0262ba68c7b07e0eb004464b333395151f053da
https://github.com/qemu/qemu/commit/a0262ba68c7b07e0eb004464b333395151f053da
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M target/arm/helper.c
Log Message:
-----------
target/arm: Stub arm_hcr_el2_eff for m-profile
M-profile doesn't have HCR_EL2. While we could test features
before each call, zero is a generally safe return value to
disable the code in the caller. This test is required to
avoid an assert in arm_is_secure_below_el3.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230227225832.816605-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: fcc7404eff24b4c8b322fb27ca5ae7f3113129c3
https://github.com/qemu/qemu/commit/fcc7404eff24b4c8b322fb27ca5ae7f3113129c3
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M target/arm/cpu.h
Log Message:
-----------
target/arm: Diagnose incorrect usage of arm_is_secure subroutines
In several places we use arm_is_secure_below_el3 and
arm_is_el3_or_mon separately from arm_is_secure.
These functions make no sense for m-profile, and
would indicate prior incorrect feature testing.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230227225832.816605-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 0ffe5b7ba883c6adbbf821f9be03475d96a2e35c
https://github.com/qemu/qemu/commit/0ffe5b7ba883c6adbbf821f9be03475d96a2e35c
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M target/arm/ptw.c
Log Message:
-----------
target/arm: Rewrite check_s2_mmu_setup
Integrate neighboring code from get_phys_addr_lpae which computed
starting level, as it is easier to validate when doing both at the
same time. Mirror the checks at the start of AArch{64,32}.S2Walk,
especially S2InvalidSL and S2InconsistentSL.
This reverts 49ba115bb74, which was incorrect -- there is nothing
in the ARM pseudocode that depends on TxSZ, i.e. outputsize; the
pseudocode is consistent in referencing PAMax.
Fixes: 49ba115bb74 ("target/arm: Pass outputsize down to check_s2_mmu_setup")
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230227225832.816605-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: ff11422804cd03494cc98691eecd3909ea09ab6f
https://github.com/qemu/qemu/commit/ff11422804cd03494cc98691eecd3909ea09ab6f
Author: Ard Biesheuvel <ardb@kernel.org>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M hw/arm/boot.c
M hw/core/loader.c
M include/hw/loader.h
Log Message:
-----------
hw: arm: Support direct boot for Linux/arm64 EFI zboot images
Fedora 39 will ship its arm64 kernels in the new generic EFI zboot
format, using gzip compression for the payload.
For doing EFI boot in QEMU, this is completely transparent, as the
firmware or bootloader will take care of this. However, for direct
kernel boot without firmware, we will lose the ability to boot such
distro kernels unless we deal with the new format directly.
EFI zboot images contain metadata in the header regarding the placement
of the compressed payload inside the image, and the type of compression
used. This means we can wire up the existing gzip support without too
much hassle, by parsing the header and grabbing the payload from inside
the loaded zboot image.
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Alex Bennée <alex.bennee@linaro.org>
Cc: Richard Henderson <richard.henderson@linaro.org>
Cc: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Message-id: 20230303160109.3626966-1-ardb@kernel.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: tweaked comment formatting, fixed checkpatch nits]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 8461bfdca9cd928b13702c1df368de14306bf917
https://github.com/qemu/qemu/commit/8461bfdca9cd928b13702c1df368de14306bf917
Author: qianfan Zhao <qianfanguijin@163.com>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M hw/i2c/allwinner-i2c.c
M include/hw/i2c/allwinner-i2c.h
Log Message:
-----------
hw: allwinner-i2c: Fix TWI_CNTR_INT_FLAG on SUN6i SoCs
TWI_CNTR_INT_FLAG is W1C(write 1 to clear and write 0 has non-effect)
register on SUN6i based SoCs, we should lower interrupt when the guest
set this bit.
The linux kernel will hang in irq handler(mv64xxx_i2c_intr) if no
device connected on the i2c bus, next is the trace log:
allwinner_i2c_write write CNTR(0x0c): 0xc4 A_ACK BUS_EN INT_EN
allwinner_i2c_write write CNTR(0x0c): 0xcc A_ACK INT_FLAG BUS_EN INT_EN
allwinner_i2c_read read CNTR(0x0c): 0xcc A_ACK INT_FLAG BUS_EN INT_EN
allwinner_i2c_read read STAT(0x10): 0x20 STAT_M_ADDR_WR_NACK
allwinner_i2c_write write CNTR(0x0c): 0x54 A_ACK M_STP BUS_EN
allwinner_i2c_write write CNTR(0x0c): 0x4c A_ACK INT_FLAG BUS_EN
allwinner_i2c_read read CNTR(0x0c): 0x4c A_ACK INT_FLAG BUS_EN
allwinner_i2c_read read STAT(0x10): 0xf8 STAT_IDLE
allwinner_i2c_write write CNTR(0x0c): 0x54 A_ACK M_STP BUS_EN
allwinner_i2c_write write CNTR(0x0c): 0x4c A_ACK INT_FLAG BUS_EN
allwinner_i2c_read read CNTR(0x0c): 0x4c A_ACK INT_FLAG BUS_EN
allwinner_i2c_read read STAT(0x10): 0xf8 STAT_IDLE
...
Fix it.
Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
Reviewed-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com>
Tested-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: a555af1707be7f564320cbb444ef68448ff16549
https://github.com/qemu/qemu/commit/a555af1707be7f564320cbb444ef68448ff16549
Author: Joel Granados <j.granados@samsung.com>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M hw/nvme/ctrl.c
Log Message:
-----------
hw/nvme: move adjustment of data_units{read,written}
Move the rounding of bytes read/written into nvme_smart_log which
reports in units of 512 bytes, rounded up in thousands. This is in
preparation for adding the Endurance Group Information log page which
reports in units of billions, rounded up.
Reviewed-by: Keith Busch <kbusch@kernel.org>
Reviewed-by: Klaus Jensen <k.jensen@samsung.com>
Signed-off-by: Joel Granados <j.granados@samsung.com>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Commit: 534a93d3a0bbde4248889ece1e0874ab98a96508
https://github.com/qemu/qemu/commit/534a93d3a0bbde4248889ece1e0874ab98a96508
Author: Niklas Cassel <niklas.cassel@wdc.com>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M hw/nvme/ns.c
M hw/nvme/nvme.h
Log Message:
-----------
hw/nvme: store a pointer to the NvmeSubsystem in the NvmeNamespace
Each NvmeNamespace can be used by serveral controllers,
but a NvmeNamespace can at most belong to a single NvmeSubsystem.
Store a pointer to the NvmeSubsystem, if the namespace was realized
with a NvmeSubsystem.
Reviewed-by: Keith Busch <kbusch@kernel.org>
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Commit: 771dbc3ac484af35cddf7e4971e66a1fd1a07156
https://github.com/qemu/qemu/commit/771dbc3ac484af35cddf7e4971e66a1fd1a07156
Author: Klaus Jensen <k.jensen@samsung.com>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M hw/nvme/ctrl.c
M hw/nvme/ns.c
M hw/nvme/nvme.h
M include/block/nvme.h
Log Message:
-----------
hw/nvme: add basic endurance group support
Add the mandatory Endurance Group identify data structures and log
pages.
For now, all namespaces in a subsystem belongs to a single Endurance
Group.
Reviewed-by: Keith Busch <kbusch@kernel.org>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Commit: e181d3da3967caf026d1ce91f9bfd847b66fdce9
https://github.com/qemu/qemu/commit/e181d3da3967caf026d1ce91f9bfd847b66fdce9
Author: Gollu Appalanaidu <anaidu.gollu@samsung.com>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M hw/nvme/ctrl.c
M hw/nvme/nvme.h
M include/block/nvme.h
Log Message:
-----------
hw/nvme: basic directives support
Add support for the Directive Send and Recv commands and the Identify
directive.
Reviewed-by: Keith Busch <kbusch@kernel.org>
Signed-off-by: Gollu Appalanaidu <anaidu.gollu@samsung.com>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Commit: 73064edfb864743cde2c08f319609344af02aeb3
https://github.com/qemu/qemu/commit/73064edfb864743cde2c08f319609344af02aeb3
Author: Jesper Devantier <j.devantier@samsung.com>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M hw/nvme/ctrl.c
M hw/nvme/ns.c
M hw/nvme/nvme.h
M hw/nvme/subsys.c
M hw/nvme/trace-events
M include/block/nvme.h
Log Message:
-----------
hw/nvme: flexible data placement emulation
Add emulation of TP4146 ("Flexible Data Placement").
Reviewed-by: Keith Busch <kbusch@kernel.org>
Signed-off-by: Jesper Devantier <j.devantier@samsung.com>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Commit: 2ddc45954f97cd1d7ee5cbca0def05e980d1da9f
https://github.com/qemu/qemu/commit/2ddc45954f97cd1d7ee5cbca0def05e980d1da9f
Author: qianfan Zhao <qianfanguijin@163.com>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M hw/arm/allwinner-h3.c
M include/hw/arm/allwinner-h3.h
Log Message:
-----------
hw: arm: allwinner-h3: Fix and complete H3 i2c devices
Allwinner h3 has 4 twi(i2c) devices named twi0, twi1, twi2 and r_twi.
The registers are compatible with TYPE_AW_I2C_SUN6I, write 1 to clear
control register's INT_FLAG bit.
Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
Reviewed-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 67128074c9bd39f607548b27d2d51c3f0ca9d35e
https://github.com/qemu/qemu/commit/67128074c9bd39f607548b27d2d51c3f0ca9d35e
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2023-03-07 (Tue, 07 Mar 2023)
Changed paths:
M hw/i386/pc_piix.c
M hw/xen/xen_pt.c
M hw/xen/xen_pt.h
M hw/xen/xen_pt_config_init.c
M hw/xen/xen_pt_stub.c
Log Message:
-----------
Merge tag 'pull-xen-20230306' of
https://xenbits.xen.org/git-http/people/aperard/qemu-dm into staging
Xen queue:
- fix for graphic passthrough with 'xenfv' machine
- fix uninitialized variable
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# gpg: Signature made Mon 06 Mar 2023 14:00:24 GMT
# gpg: using RSA key F80C006308E22CFD8A92E7980CF5572FD7FB55AF
# gpg: Good signature from "Anthony PERARD <anthony.perard@gmail.com>"
[marginal]
# gpg: aka "Anthony PERARD <anthony.perard@citrix.com>"
[marginal]
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg: It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 5379 2F71 024C 600F 778A 7161 D8D5 7199 DF83 42C8
# Subkey fingerprint: F80C 0063 08E2 2CFD 8A92 E798 0CF5 572F D7FB 55AF
* tag 'pull-xen-20230306' of
https://xenbits.xen.org/git-http/people/aperard/qemu-dm:
hw/xen/xen_pt: fix uninitialized variable
xen/pt: reserve PCI slot 2 for Intel igd-passthru
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: c1feaf76833f5b29f887fd64371512731cbf7086
https://github.com/qemu/qemu/commit/c1feaf76833f5b29f887fd64371512731cbf7086
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2023-03-07 (Tue, 07 Mar 2023)
Changed paths:
M hw/nvme/ctrl.c
M hw/nvme/ns.c
M hw/nvme/nvme.h
M hw/nvme/subsys.c
M hw/nvme/trace-events
M include/block/nvme.h
Log Message:
-----------
Merge tag 'nvme-next-pull-request' of https://gitlab.com/birkelund/qemu into
staging
hw/nvme updates
* basic support for directives
* simple support for endurance groups
* emulation of flexible data placement (tp4146)
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# gpg: Signature made Mon 06 Mar 2023 14:34:02 GMT
# gpg: using RSA key 522833AA75E2DCE6A24766C04DE1AF316D4F0DE9
# gpg: Good signature from "Klaus Jensen <its@irrelevant.dk>" [full]
# gpg: aka "Klaus Jensen <k.jensen@samsung.com>" [full]
# Primary key fingerprint: DDCA 4D9C 9EF9 31CC 3468 4272 63D5 6FC5 E55D A838
# Subkey fingerprint: 5228 33AA 75E2 DCE6 A247 66C0 4DE1 AF31 6D4F 0DE9
* tag 'nvme-next-pull-request' of https://gitlab.com/birkelund/qemu:
hw/nvme: flexible data placement emulation
hw/nvme: basic directives support
hw/nvme: add basic endurance group support
hw/nvme: store a pointer to the NvmeSubsystem in the NvmeNamespace
hw/nvme: move adjustment of data_units{read,written}
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: c29a2f40cd5d1fdad4632b48343cd968db041a44
https://github.com/qemu/qemu/commit/c29a2f40cd5d1fdad4632b48343cd968db041a44
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2023-03-07 (Tue, 07 Mar 2023)
Changed paths:
M configs/targets/aarch64-linux-user.mak
M configs/targets/aarch64-softmmu.mak
M configs/targets/aarch64_be-linux-user.mak
A gdb-xml/aarch64-pauth.xml
M hw/arm/allwinner-h3.c
M hw/arm/boot.c
M hw/core/loader.c
M hw/i2c/allwinner-i2c.c
M include/hw/arm/allwinner-h3.h
M include/hw/i2c/allwinner-i2c.h
M include/hw/loader.h
M target/arm/cpu.h
M target/arm/gdbstub.c
M target/arm/gdbstub64.c
M target/arm/helper.c
M target/arm/internals.h
M target/arm/ptw.c
M target/arm/tcg/m_helper.c
M target/arm/tcg/pauth_helper.c
Log Message:
-----------
Merge tag 'pull-target-arm-20230306' of
https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue:
* allwinner-h3: Fix I2C controller model for Sun6i SoCs
* allwinner-h3: Add missing i2c controllers
* Expose M-profile system registers to gdbstub
* Expose pauth information to gdbstub
* Support direct boot for Linux/arm64 EFI zboot images
* Fix incorrect stage 2 MMU setup validation
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# gpg: Signature made Mon 06 Mar 2023 15:34:04 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
[ultimate]
# gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20230306' of
https://git.linaro.org/people/pmaydell/qemu-arm: (21 commits)
hw: arm: allwinner-h3: Fix and complete H3 i2c devices
hw: allwinner-i2c: Fix TWI_CNTR_INT_FLAG on SUN6i SoCs
hw: arm: Support direct boot for Linux/arm64 EFI zboot images
target/arm: Rewrite check_s2_mmu_setup
target/arm: Diagnose incorrect usage of arm_is_secure subroutines
target/arm: Stub arm_hcr_el2_eff for m-profile
target/arm: Handle m-profile in arm_is_secure
target/arm: Implement gdbstub m-profile systemreg and secext
target/arm: Export arm_v7m_get_sp_ptr
target/arm: Export arm_v7m_mrs_control
target/arm: Implement gdbstub pauth extension
target/arm: Create pauth_ptr_mask
target/arm: Simplify iteration over bit widths
target/arm: Add name argument to output_vector_union_type
target/arm: Fix svep width in arm_gen_dynamic_svereg_xml
target/arm: Hoist pred_width in arm_gen_dynamic_svereg_xml
target/arm: Simplify register counting in arm_gen_dynamic_svereg_xml
target/arm: Split out output_vector_union_type
target/arm: Move arm_gen_dynamic_svereg_xml to gdbstub64.c
target/arm: Unexport arm_gen_dynamic_sysreg_xml
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Compare: https://github.com/qemu/qemu/compare/817fd33836e7...c29a2f40cd5d
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