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[Qemu-commits] [qemu/qemu] 7a7142: memory: Log access direction for inva

From: Richard Henderson
Subject: [Qemu-commits] [qemu/qemu] 7a7142: memory: Log access direction for invalid accesses
Date: Wed, 13 Oct 2021 11:49:35 -0700 
  Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: 7a7142f0254464d16f0ddefd61237b40bfa97a47
      
https://github.com/qemu/qemu/commit/7a7142f0254464d16f0ddefd61237b40bfa97a47
  Author: BALATON Zoltan <balaton@eik.bme.hu>
  Date:   2021-10-13 (Wed, 13 Oct 2021)

  Changed paths:
    M softmmu/memory.c

  Log Message:
  -----------
  memory: Log access direction for invalid accesses

In memory_region_access_valid() invalid accesses are logged to help
debugging but the log message does not say if it was a read or write.
Log that too to better identify the access causing the problem.

Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <20211011173616.F1DE0756022@zero.eik.bme.hu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: c21751f394591f2444c62bfcb1124300849ab46a
      
https://github.com/qemu/qemu/commit/c21751f394591f2444c62bfcb1124300849ab46a
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-10-13 (Wed, 13 Oct 2021)

  Changed paths:
    M target/arm/helper-a64.c

  Log Message:
  -----------
  target/arm: Use MO_128 for 16 byte atomics

Cc: qemu-arm@nongnu.org
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 26b14640d933d703c175a314479bdd0b8c26fedd
      
https://github.com/qemu/qemu/commit/26b14640d933d703c175a314479bdd0b8c26fedd
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-10-13 (Wed, 13 Oct 2021)

  Changed paths:
    M target/i386/tcg/mem_helper.c

  Log Message:
  -----------
  target/i386: Use MO_128 for 16 byte atomics

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 68e33d869d2be9a765644782a0834fd87eec98f0
      
https://github.com/qemu/qemu/commit/68e33d869d2be9a765644782a0834fd87eec98f0
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-10-13 (Wed, 13 Oct 2021)

  Changed paths:
    M target/ppc/translate.c

  Log Message:
  -----------
  target/ppc: Use MO_128 for 16 byte atomics

Cc: qemu-ppc@nongnu.org
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 35c65de02998d23a26964c61b8c2e3b4235dcceb
      
https://github.com/qemu/qemu/commit/35c65de02998d23a26964c61b8c2e3b4235dcceb
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-10-13 (Wed, 13 Oct 2021)

  Changed paths:
    M target/s390x/tcg/mem_helper.c

  Log Message:
  -----------
  target/s390x: Use MO_128 for 16 byte atomics

Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: f79e80899dbcd306ae2e8a43bc5e139b051f30f4
      
https://github.com/qemu/qemu/commit/f79e80899dbcd306ae2e8a43bc5e139b051f30f4
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-10-13 (Wed, 13 Oct 2021)

  Changed paths:
    M target/hexagon/cpu.h

  Log Message:
  -----------
  target/hexagon: Implement cpu_mmu_index

The function is trivial for user-only, but still must be present.

Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: f83bcecb1ffe25a18367409eaf4ba1453c835c48
      
https://github.com/qemu/qemu/commit/f83bcecb1ffe25a18367409eaf4ba1453c835c48
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-10-13 (Wed, 13 Oct 2021)

  Changed paths:
    M accel/tcg/cputlb.c
    A accel/tcg/ldst_common.c.inc
    M accel/tcg/user-exec.c
    M docs/devel/loads-stores.rst
    M include/exec/cpu_ldst.h

  Log Message:
  -----------
  accel/tcg: Add cpu_{ld,st}*_mmu interfaces

These functions are much closer to the softmmu helper
functions, in that they take the complete MemOpIdx,
and from that they may enforce required alignment.

The previous cpu_ldst.h functions did not have alignment info,
and so did not enforce it.  Retain this by adding MO_UNALN to
the MemOp that we create in calling the new functions.

Note that we are not yet enforcing alignment for user-only,
but we now have the information with which to do so.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: b4c8f3d4dddcb6e547e1ba318f60ae9566743db1
      
https://github.com/qemu/qemu/commit/b4c8f3d4dddcb6e547e1ba318f60ae9566743db1
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-10-13 (Wed, 13 Oct 2021)

  Changed paths:
    M include/exec/cpu_ldst.h
    M include/tcg/tcg.h
    M target/arm/helper-a64.c
    M target/m68k/op_helper.c
    M target/ppc/mem_helper.c
    M target/s390x/tcg/mem_helper.c

  Log Message:
  -----------
  accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h

The previous placement in tcg/tcg.h was not logical.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 948f88661c68307162dc4241144d87dc7772ca8d
      
https://github.com/qemu/qemu/commit/948f88661c68307162dc4241144d87dc7772ca8d
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-10-13 (Wed, 13 Oct 2021)

  Changed paths:
    M target/mips/tcg/msa_helper.c

  Log Message:
  -----------
  target/mips: Use cpu_*_data_ra for msa load/store

We should not have been using the helper_ret_* set of
functions, as they are supposed to be private to tcg.
Nor should we have been using the plain cpu_*_data set
of functions, as they do not handle unwinding properly.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 68ad9260e099da7c6345140d1da1811285e05757
      
https://github.com/qemu/qemu/commit/68ad9260e099da7c6345140d1da1811285e05757
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-10-13 (Wed, 13 Oct 2021)

  Changed paths:
    M target/mips/tcg/msa_helper.c

  Log Message:
  -----------
  target/mips: Use 8-byte memory ops for msa load/store

Rather than use 4-16 separate operations, use 2 operations
plus some byte reordering as necessary.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: bfe5b847af66be76c325f974017412f42e1dd62c
      
https://github.com/qemu/qemu/commit/bfe5b847af66be76c325f974017412f42e1dd62c
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-10-13 (Wed, 13 Oct 2021)

  Changed paths:
    M target/s390x/tcg/mem_helper.c

  Log Message:
  -----------
  target/s390x: Use cpu_*_mmu instead of helper_*_mmu

The helper_*_mmu functions were the only thing available
when this code was written.  This could have been adjusted
when we added cpu_*_mmuidx_ra, but now we can most easily
use the newest set of interfaces.

Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: a8f84958d09bfca0a775d8000bf81b0b66ca8066
      
https://github.com/qemu/qemu/commit/a8f84958d09bfca0a775d8000bf81b0b66ca8066
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-10-13 (Wed, 13 Oct 2021)

  Changed paths:
    M target/sparc/ldst_helper.c

  Log Message:
  -----------
  target/sparc: Use cpu_*_mmu instead of helper_*_mmu

The helper_*_mmu functions were the only thing available
when this code was written.  This could have been adjusted
when we added cpu_*_mmuidx_ra, but now we can most easily
use the newest set of interfaces.

Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 1a2eaf9e3897b0c51ef65e676c9bbd125506dafd
      
https://github.com/qemu/qemu/commit/1a2eaf9e3897b0c51ef65e676c9bbd125506dafd
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-10-13 (Wed, 13 Oct 2021)

  Changed paths:
    M target/arm/helper-a64.c
    M target/arm/m_helper.c

  Log Message:
  -----------
  target/arm: Use cpu_*_mmu instead of helper_*_mmu

The helper_*_mmu functions were the only thing available
when this code was written.  This could have been adjusted
when we added cpu_*_mmuidx_ra, but now we can most easily
use the newest set of interfaces.

Cc: qemu-arm@nongnu.org
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: d2ba80265739d1699dd33b93ed7db8d46e875ab6
      
https://github.com/qemu/qemu/commit/d2ba80265739d1699dd33b93ed7db8d46e875ab6
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-10-13 (Wed, 13 Oct 2021)

  Changed paths:
    M accel/tcg/cputlb.c
    A include/tcg/tcg-ldst.h
    M include/tcg/tcg.h
    M tcg/tcg.c
    M tcg/tci.c

  Log Message:
  -----------
  tcg: Move helper_*_mmu decls to tcg/tcg-ldst.h

These functions have been replaced by cpu_*_mmu as the
most proper interface to use from target code.

Hide these declarations from code that should not use them.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 76e366e728549b3324cc2dee6745d6a4f1af18e6
      
https://github.com/qemu/qemu/commit/76e366e728549b3324cc2dee6745d6a4f1af18e6
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-10-13 (Wed, 13 Oct 2021)

  Changed paths:
    M tcg/tcg-op.c

  Log Message:
  -----------
  tcg: Canonicalize alignment flags in MemOp

Having observed e.g. al8+leq in dumps, canonicalize to al+leq.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: e5b2333f24ff207f08cf96e73d2e11438c985801
      
https://github.com/qemu/qemu/commit/e5b2333f24ff207f08cf96e73d2e11438c985801
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-10-13 (Wed, 13 Oct 2021)

  Changed paths:
    M accel/tcg/cputlb.c
    A accel/tcg/ldst_common.c.inc
    M accel/tcg/user-exec.c
    M docs/devel/loads-stores.rst
    M include/exec/cpu_ldst.h
    A include/tcg/tcg-ldst.h
    M include/tcg/tcg.h
    M softmmu/memory.c
    M target/arm/helper-a64.c
    M target/arm/m_helper.c
    M target/hexagon/cpu.h
    M target/i386/tcg/mem_helper.c
    M target/m68k/op_helper.c
    M target/mips/tcg/msa_helper.c
    M target/ppc/mem_helper.c
    M target/ppc/translate.c
    M target/s390x/tcg/mem_helper.c
    M target/sparc/ldst_helper.c
    M tcg/tcg-op.c
    M tcg/tcg.c
    M tcg/tci.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20211013' into staging

Use MO_128 for 16-byte atomic memory operations.
Add cpu_ld/st_mmu memory primitives.
Move helper_ld/st memory helpers out of tcg.h.
Canonicalize alignment flags in MemOp.

# gpg: Signature made Wed 13 Oct 2021 10:48:45 AM PDT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" 
[ultimate]

* remotes/rth/tags/pull-tcg-20211013:
  tcg: Canonicalize alignment flags in MemOp
  tcg: Move helper_*_mmu decls to tcg/tcg-ldst.h
  target/arm: Use cpu_*_mmu instead of helper_*_mmu
  target/sparc: Use cpu_*_mmu instead of helper_*_mmu
  target/s390x: Use cpu_*_mmu instead of helper_*_mmu
  target/mips: Use 8-byte memory ops for msa load/store
  target/mips: Use cpu_*_data_ra for msa load/store
  accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h
  accel/tcg: Add cpu_{ld,st}*_mmu interfaces
  target/hexagon: Implement cpu_mmu_index
  target/s390x: Use MO_128 for 16 byte atomics
  target/ppc: Use MO_128 for 16 byte atomics
  target/i386: Use MO_128 for 16 byte atomics
  target/arm: Use MO_128 for 16 byte atomics
  memory: Log access direction for invalid accesses

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Compare: https://github.com/qemu/qemu/compare/984b2b504942...e5b2333f24ff
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