[Qemu-commits] [qemu/qemu] c6f321: target/i386: add two missing VMX features for Skyl...

[Peter Maydell]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: c6f3215ffa3064fd04e00d2b159c3b90c3c9b1a5
      
https://github.com/qemu/qemu/commit/c6f3215ffa3064fd04e00d2b159c3b90c3c9b1a5
  Author: Paolo Bonzini <address@hidden>
  Date:   2019-11-26 (Tue, 26 Nov 2019)

  Changed paths:
    M target/i386/cpu.c

  Log Message:
  -----------
  target/i386: add two missing VMX features for Skylake and CascadeLake Server

They are present in client (Core) Skylake but pasted wrong into the server
SKUs.

Reported-by: Dr. David Alan Gilbert <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: fbafbb6db77428d9a0bf22ea8e9c4a07140ae7d9
      
https://github.com/qemu/qemu/commit/fbafbb6db77428d9a0bf22ea8e9c4a07140ae7d9
  Author: Cameron Esfahani <address@hidden>
  Date:   2019-11-26 (Tue, 26 Nov 2019)

  Changed paths:
    M target/i386/hvf/hvf.c

  Log Message:
  -----------
  hvf: non-RAM, non-ROMD memory ranges are now correctly mapped in

If an area is non-RAM and non-ROMD, then remove mappings so accesses
will trap and can be emulated.  Change hvf_find_overlap_slot() to take
a size instead of an end address: it wouldn't return a slot because
callers would pass the same address for start and end.  Don't always
map area as read/write/execute, respect area flags.

Signed-off-by: Cameron Esfahani <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: 9fedbbeeee6dead7e73b3a53e3c80dd37392b464
      
https://github.com/qemu/qemu/commit/9fedbbeeee6dead7e73b3a53e3c80dd37392b464
  Author: Cameron Esfahani <address@hidden>
  Date:   2019-11-26 (Tue, 26 Nov 2019)

  Changed paths:
    M target/i386/hvf/hvf.c
    M target/i386/hvf/x86_emu.c
    M target/i386/hvf/x86hvf.c

  Log Message:
  -----------
  hvf: remove TSC synchronization code because it isn't fully complete

The existing code in QEMU's HVF support to attempt to synchronize TSC
across multiple cores is not sufficient.  TSC value on other cores
can go backwards.  Until implementation is fixed, remove calls to
hv_vm_sync_tsc().  Pass through TSC to guest OS.

Signed-off-by: Cameron Esfahani <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: 8c3b0e9e678a3a690d1411a8231f29082ab50988
      
https://github.com/qemu/qemu/commit/8c3b0e9e678a3a690d1411a8231f29082ab50988
  Author: Cameron Esfahani <address@hidden>
  Date:   2019-11-26 (Tue, 26 Nov 2019)

  Changed paths:
    M target/i386/hvf/x86_decode.c
    M target/i386/hvf/x86_decode.h

  Log Message:
  -----------
  hvf: correctly handle REX prefix in relation to legacy prefixes

In real x86 processors, the REX prefix must come after legacy prefixes.
REX before legacy is ignored.  Update the HVF emulation code to properly
handle this.  Fix some spelling errors in constants.  Fix some decoder
table initialization issues found by Coverity.

Signed-off-by: Cameron Esfahani <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: e37aa8b0e410e83b4e150e38e83e385169ba09a7
      
https://github.com/qemu/qemu/commit/e37aa8b0e410e83b4e150e38e83e385169ba09a7
  Author: Cameron Esfahani <address@hidden>
  Date:   2019-11-26 (Tue, 26 Nov 2019)

  Changed paths:
    M target/i386/hvf/hvf.c
    M target/i386/hvf/vmx.h

  Log Message:
  -----------
  hvf: more accurately match SDM when setting CR0 and PDPTE registers

More accurately match SDM when setting CR0 and PDPTE registers.

Clear PDPTE registers when resetting vcpus.

Signed-off-by: Cameron Esfahani <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>


  Commit: e0d79c9435c60d7637a49083a5789471b1b70bdb
      
https://github.com/qemu/qemu/commit/e0d79c9435c60d7637a49083a5789471b1b70bdb
  Author: Peter Maydell <address@hidden>
  Date:   2019-11-26 (Tue, 26 Nov 2019)

  Changed paths:
    M target/i386/cpu.c
    M target/i386/hvf/hvf.c
    M target/i386/hvf/vmx.h
    M target/i386/hvf/x86_decode.c
    M target/i386/hvf/x86_decode.h
    M target/i386/hvf/x86_emu.c
    M target/i386/hvf/x86hvf.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* VMX feature fix (myself)
* HVF fixes (Cameron)

# gpg: Signature made Tue 26 Nov 2019 08:58:43 GMT
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "address@hidden"
# gpg: Good signature from "Paolo Bonzini <address@hidden>" [full]
# gpg:                 aka "Paolo Bonzini <address@hidden>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* remotes/bonzini/tags/for-upstream:
  hvf: more accurately match SDM when setting CR0 and PDPTE registers
  hvf: correctly handle REX prefix in relation to legacy prefixes
  hvf: remove TSC synchronization code because it isn't fully complete
  hvf: non-RAM, non-ROMD memory ranges are now correctly mapped in
  target/i386: add two missing VMX features for Skylake and CascadeLake Server

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/5f64adc13884...e0d79c9435c6