[Qemu-commits] [qemu/qemu] 32c072: trace: fix misreporting of TCG access sizes for us...

[GitHub]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 32c072341f0d17ddc7443bd4c0adb9d2ed55fbd4
      
https://github.com/qemu/qemu/commit/32c072341f0d17ddc7443bd4c0adb9d2ed55fbd4
  Author: Emilio G. Cota <address@hidden>
  Date:   2018-06-27 (Wed, 27 Jun 2018)

  Changed paths:
    M include/exec/cpu_ldst_useronly_template.h

  Log Message:
  -----------
  trace: fix misreporting of TCG access sizes for user-space

trace_mem_build_info expects a size_shift for its first argument. Fix it.

Signed-off-by: Emilio G. Cota <address@hidden>
Message-id: address@hidden
Signed-off-by: Stefan Hajnoczi <address@hidden>


  Commit: 3d69b95e5e2ef4c5acfa2b2aaa93e2fad9eeeaa1
      
https://github.com/qemu/qemu/commit/3d69b95e5e2ef4c5acfa2b2aaa93e2fad9eeeaa1
  Author: Emilio G. Cota <address@hidden>
  Date:   2018-06-27 (Wed, 27 Jun 2018)

  Changed paths:
    M trace/mem-internal.h
    M trace/mem.h

  Log Message:
  -----------
  trace: simplify trace_mem functions

Add some defines for the mem_info bits, simplify
trace_mem_build_info, and also simplify trace_mem_get_info
by making it a wrapper around trace_mem_build_info.

This paves the way for increasing size_shift by one bit.

Signed-off-by: Emilio G. Cota <address@hidden>
Message-id: address@hidden
Signed-off-by: Stefan Hajnoczi <address@hidden>


  Commit: 706485d2e2b1e1770d0fecdae7639dc528d77583
      
https://github.com/qemu/qemu/commit/706485d2e2b1e1770d0fecdae7639dc528d77583
  Author: Emilio G. Cota <address@hidden>
  Date:   2018-06-27 (Wed, 27 Jun 2018)

  Changed paths:
    M trace/mem-internal.h

  Log Message:
  -----------
  trace: expand mem_info:size_shift to 3 bits

This will allow us to trace 16B-long memory accesses.

Signed-off-by: Emilio G. Cota <address@hidden>
Message-id: address@hidden
Signed-off-by: Stefan Hajnoczi <address@hidden>


  Commit: f9b47999afbf84ddbe7e5649a82f477bb77e3b38
      
https://github.com/qemu/qemu/commit/f9b47999afbf84ddbe7e5649a82f477bb77e3b38
  Author: Emilio G. Cota <address@hidden>
  Date:   2018-06-27 (Wed, 27 Jun 2018)

  Changed paths:
    M trace/mem-internal.h

  Log Message:
  -----------
  trace: add trace_mem_build_info_no_se_be/le

These will be used by the following commit.

Signed-off-by: Emilio G. Cota <address@hidden>
Message-id: address@hidden
Signed-off-by: Stefan Hajnoczi <address@hidden>


  Commit: d071f4cd5579fe82ba764e4c29f06664658e3762
      
https://github.com/qemu/qemu/commit/d071f4cd5579fe82ba764e4c29f06664658e3762
  Author: Emilio G. Cota <address@hidden>
  Date:   2018-06-27 (Wed, 27 Jun 2018)

  Changed paths:
    M accel/tcg/atomic_template.h

  Log Message:
  -----------
  trace: enable tracing of TCG atomics

We do not trace guest atomic accesses. Fix it.

Tested with a modified atomic_add-bench so that it executes
a deterministic number of instructions, i.e. fixed seeding,
no threading and fixed number of loop iterations instead
of running for a certain time.

Before:
- With parallel_cpus = false (no clone syscall so it is never set to true):
  220070 memory accesses
- With parallel_cpus = true (hard-coded):
  212105 memory accesses <-- we're not tracing the atomics!

After:
  220070 memory accesses regardless of parallel_cpus.

Signed-off-by: Emilio G. Cota <address@hidden>
Message-id: address@hidden
Signed-off-by: Stefan Hajnoczi <address@hidden>


  Commit: ec09f877532210e28e1d4b6b12896d3eb6d8e8d1
      
https://github.com/qemu/qemu/commit/ec09f877532210e28e1d4b6b12896d3eb6d8e8d1
  Author: Stefan Hajnoczi <address@hidden>
  Date:   2018-06-27 (Wed, 27 Jun 2018)

  Changed paths:
    M docs/devel/tracing.txt
    M migration/trace-events
    M qapi/trace-events
    M scripts/tracetool/__init__.py

  Log Message:
  -----------
  trace: forbid floating point types

Only one existing trace event uses a floating point type.  Unfortunately
float and double cannot be supported since SystemTap does not have
floating point types.

Remove float and double from the whitelist and document this limitation.
Update the migrate_transferred trace event to use uint64_t instead of
double.

Cc: Dr. David Alan Gilbert <address@hidden>
Cc: Daniel P. Berrangé <address@hidden>
Cc: Peter Maydell <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Juan Quintela <address@hidden>
Message-id: address@hidden
Signed-off-by: Stefan Hajnoczi <address@hidden>


  Commit: 1571a23c8f6fff61cf0ed7acb41007d1fd6240f2
      
https://github.com/qemu/qemu/commit/1571a23c8f6fff61cf0ed7acb41007d1fd6240f2
  Author: Peter Maydell <address@hidden>
  Date:   2018-06-28 (Thu, 28 Jun 2018)

  Changed paths:
    M accel/tcg/atomic_template.h
    M docs/devel/tracing.txt
    M include/exec/cpu_ldst_useronly_template.h
    M migration/trace-events
    M qapi/trace-events
    M scripts/tracetool/__init__.py
    M trace/mem-internal.h
    M trace/mem.h

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/stefanha/tags/tracing-pull-request' 
into staging

Pull request

 * Trace TCG atomic memory accesses
 * Document that trace event arguments cannot be floating point

# gpg: Signature made Wed 27 Jun 2018 13:57:40 BST
# gpg:                using RSA key 9CA4ABB381AB73C8
# gpg: Good signature from "Stefan Hajnoczi <address@hidden>"
# gpg:                 aka "Stefan Hajnoczi <address@hidden>"
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35  775A 9CA4 ABB3 81AB 73C8

* remotes/stefanha/tags/tracing-pull-request:
  trace: forbid floating point types
  trace: enable tracing of TCG atomics
  trace: add trace_mem_build_info_no_se_be/le
  trace: expand mem_info:size_shift to 3 bits
  trace: simplify trace_mem functions
  trace: fix misreporting of TCG access sizes for user-space

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/00928a421d47...1571a23c8f6f
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