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[Qemu-commits] [qemu/qemu] 889912: target-mips/cpu.h: Fix spell error
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GitHub |
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[Qemu-commits] [qemu/qemu] 889912: target-mips/cpu.h: Fix spell error |
Date: |
Mon, 25 Jan 2016 04:00:05 -0800 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 889912999d3f089cb8b6db8763ebec11022768b9
https://github.com/qemu/qemu/commit/889912999d3f089cb8b6db8763ebec11022768b9
Author: Dongxue Zhang <address@hidden>
Date: 2016-01-23 (Sat, 23 Jan 2016)
Changed paths:
M target-mips/cpu.h
Log Message:
-----------
target-mips/cpu.h: Fix spell error
CP0IntCtl_IPPC1, the last letter should be 'i', not 'one'.
Signed-off-by: Dongxue Zhang <address@hidden>
Reviewed-by: Leon Alrae <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>
Commit: 1aa56f6ee7d2375b0734e98ba69cc41416894bbc
https://github.com/qemu/qemu/commit/1aa56f6ee7d2375b0734e98ba69cc41416894bbc
Author: Aurelien Jarno <address@hidden>
Date: 2016-01-23 (Sat, 23 Jan 2016)
Changed paths:
M target-mips/op_helper.c
Log Message:
-----------
target-mips: silence NaNs for cvt.s.d and cvt.d.s
cvt.s.d and cvt.d.s are FP operations and thus need to convert input
sNaN into corresponding qNaN. Explicitely use the floatXX_maybe_silence_nan
functions for that as the floatXX_to_floatXX functions do not do that.
Cc: Leon Alrae <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Reviewed-by: Leon Alrae <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>
Commit: 51243852af322f0a1103a90c936c43db84def82f
https://github.com/qemu/qemu/commit/51243852af322f0a1103a90c936c43db84def82f
Author: Miodrag Dinic <address@hidden>
Date: 2016-01-23 (Sat, 23 Jan 2016)
Changed paths:
M target-mips/translate.c
Log Message:
-----------
target-mips: Fix ALIGN instruction when bp=0
If executing ALIGN with shift count bp=0 within mips64 emulation,
the result of the operation should be sign extended.
Taken from the official documentation (pseudo code) :
ALIGN:
tmp_rt_hi = unsigned_word(GPR[rt]) << (8*bp)
tmp_rs_lo = unsigned_word(GPR[rs]) >> (8*(4-bp))
tmp = tmp_rt_hi || tmp_rt_lo
GPR[rd] = sign_extend.32(tmp)
Signed-off-by: Miodrag Dinic <address@hidden>
Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Leon Alrae <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>
Commit: c684822ad29968af09735148f03a511bc514589d
https://github.com/qemu/qemu/commit/c684822ad29968af09735148f03a511bc514589d
Author: Peter Maydell <address@hidden>
Date: 2016-01-23 (Sat, 23 Jan 2016)
Changed paths:
M disas/mips.c
M hw/mips/addr.c
M hw/mips/cputimer.c
M hw/mips/gt64xxx_pci.c
M hw/mips/mips_fulong2e.c
M hw/mips/mips_int.c
M hw/mips/mips_jazz.c
M hw/mips/mips_malta.c
M hw/mips/mips_mipssim.c
M hw/mips/mips_r4k.c
M target-mips/cpu.c
M target-mips/dsp_helper.c
M target-mips/gdbstub.c
M target-mips/helper.c
M target-mips/kvm.c
M target-mips/lmi_helper.c
M target-mips/machine.c
M target-mips/mips-semi.c
M target-mips/msa_helper.c
M target-mips/op_helper.c
M target-mips/translate.c
Log Message:
-----------
mips: Clean up includes
Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.
This commit was created with scripts/clean-includes.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Leon Alrae <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>
Commit: 6ee06cc3dc7e8eb238e2f60cfd04f094d5c6b948
https://github.com/qemu/qemu/commit/6ee06cc3dc7e8eb238e2f60cfd04f094d5c6b948
Author: Peter Maydell <address@hidden>
Date: 2016-01-25 (Mon, 25 Jan 2016)
Changed paths:
M disas/mips.c
M hw/mips/addr.c
M hw/mips/cputimer.c
M hw/mips/gt64xxx_pci.c
M hw/mips/mips_fulong2e.c
M hw/mips/mips_int.c
M hw/mips/mips_jazz.c
M hw/mips/mips_malta.c
M hw/mips/mips_mipssim.c
M hw/mips/mips_r4k.c
M target-mips/cpu.c
M target-mips/cpu.h
M target-mips/dsp_helper.c
M target-mips/gdbstub.c
M target-mips/helper.c
M target-mips/kvm.c
M target-mips/lmi_helper.c
M target-mips/machine.c
M target-mips/mips-semi.c
M target-mips/msa_helper.c
M target-mips/op_helper.c
M target-mips/translate.c
Log Message:
-----------
Merge remote-tracking branch 'remotes/lalrae/tags/mips-20160125' into staging
MIPS patches 2016-01-25
Changes:
* fixes and includes clean-up
# gpg: Signature made Mon 25 Jan 2016 09:29:51 GMT using RSA key ID 0B29DA6B
# gpg: Good signature from "Leon Alrae <address@hidden>"
* remotes/lalrae/tags/mips-20160125:
mips: Clean up includes
target-mips: Fix ALIGN instruction when bp=0
target-mips: silence NaNs for cvt.s.d and cvt.d.s
target-mips/cpu.h: Fix spell error
Signed-off-by: Peter Maydell <address@hidden>
Compare: https://github.com/qemu/qemu/compare/047e363b0567...6ee06cc3dc7e
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