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Re: completion timeouts with pin-based interrupts in QEMU hw/nvme


From: Klaus Jensen
Subject: Re: completion timeouts with pin-based interrupts in QEMU hw/nvme
Date: Thu, 19 Jan 2023 08:06:43 +0100

On Jan 18 15:26, Keith Busch wrote:
> Klaus,
> 
> This isn't going to help your issue, but there are at least two legacy
> irq bugs in the nvme qemu implementation.
> 
> 1. The admin queue breaks if start with legacy and later initialize
> msix.
> 

Hmm. Interesting that we have not encountered this before - is this
because the kernel will enable MSI-X early and use it for the admin
queue immediately?

> 2. The legacy vector is shared among all queues, but it's being
> deasserted when the first queue's doorbell makes it empty. It should
> remain enabled if any cq is non-empty.

I was certain that we fixed this already in commit 83d7ed5c570
("hw/nvme: fix pin-based interrupt behavior (again)")...

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