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[Qemu-block] [PATCH 9/9] linux-user: add IBT support to x86 safe-syscall
From: |
Paolo Bonzini |
Subject: |
[Qemu-block] [PATCH 9/9] linux-user: add IBT support to x86 safe-syscall.S |
Date: |
Sat, 4 May 2019 06:05:27 -0600 |
Because safe-syscall.S does not go through the C compiler, the
.note.gnu.property note has to be added manually. Safe syscalls do not
involve any indirect branch or stack unwinding, so they are trivially
safe for IBT or shadow stacks.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
---
linux-user/host/i386/safe-syscall.inc.S | 19 +++++++++++++++++++
linux-user/host/x86_64/safe-syscall.inc.S | 19 +++++++++++++++++++
2 files changed, 38 insertions(+)
diff --git a/linux-user/host/i386/safe-syscall.inc.S
b/linux-user/host/i386/safe-syscall.inc.S
index 9e58fc6504..6c6d568d62 100644
--- a/linux-user/host/i386/safe-syscall.inc.S
+++ b/linux-user/host/i386/safe-syscall.inc.S
@@ -98,3 +98,22 @@ safe_syscall_end:
.cfi_endproc
.size safe_syscall_base, .-safe_syscall_base
+
+ .pushsection ".note.gnu.property", "a"
+ .p2align 2
+ .long 1f - 0f /* name length. */
+ .long 4f - 1f /* data length. */
+ .long 5 /* NT_GNU_PROPERTY_TYPE_0. */
+0:
+ .asciz "GNU" /* vendor name. */
+ .p2align 2
+1:
+ /* GNU_PROPERTY_X86_FEATURE_1_AND. */
+ .long 0xc0000002 /* pr_type. */
+ .long 3f - 2f /* pr_datasz. */
+2:
+ .long 0x3 /* IBT, SHSTK */
+3:
+ .p2align 2
+4:
+ .popsection
diff --git a/linux-user/host/x86_64/safe-syscall.inc.S
b/linux-user/host/x86_64/safe-syscall.inc.S
index f36992daa3..e1a57db338 100644
--- a/linux-user/host/x86_64/safe-syscall.inc.S
+++ b/linux-user/host/x86_64/safe-syscall.inc.S
@@ -89,3 +89,22 @@ safe_syscall_end:
.cfi_endproc
.size safe_syscall_base, .-safe_syscall_base
+
+ .pushsection ".note.gnu.property", "a"
+ .p2align 3
+ .long 1f - 0f /* name length. */
+ .long 4f - 1f /* data length. */
+ .long 5 /* NT_GNU_PROPERTY_TYPE_0. */
+0:
+ .asciz "GNU" /* vendor name. */
+ .p2align 3
+1:
+ /* GNU_PROPERTY_X86_FEATURE_1_AND. */
+ .long 0xc0000002 /* pr_type. */
+ .long 3f - 2f /* pr_datasz. */
+2:
+ .long 0x3 /* IBT, SHSTK */
+3:
+ .p2align 3
+4:
+ .popsection
--
2.21.0
- Re: [Qemu-block] [PATCH 4/9] coroutine: add host specific coroutine backend for 64-bit ARM, (continued)
- [Qemu-block] [PATCH 3/9] coroutine: add host specific coroutine backend for 64-bit x86, Paolo Bonzini, 2019/05/04
- [Qemu-block] [PATCH 5/9] coroutine: add host specific coroutine backend for 64-bit s390, Paolo Bonzini, 2019/05/04
- [Qemu-block] [PATCH 6/9] configure: add control-flow protection support, Paolo Bonzini, 2019/05/04
- [Qemu-block] [PATCH 7/9] tcg: add tcg_out_start, Paolo Bonzini, 2019/05/04
- [Qemu-block] [PATCH 8/9] tcg/i386: add support for IBT, Paolo Bonzini, 2019/05/04
- [Qemu-block] [PATCH 9/9] linux-user: add IBT support to x86 safe-syscall.S,
Paolo Bonzini <=
- [Qemu-block] [PATCH 10/9] coroutine-asm: add x86 CET shadow stack support, Paolo Bonzini, 2019/05/04
- Re: [Qemu-block] [Qemu-devel] [PATCH 0/9] Assembly coroutine backend and x86 CET support, Alex Bennée, 2019/05/05
Re: [Qemu-block] [Qemu-devel] [PATCH 0/9] Assembly coroutine backend and x86 CET support, Stefan Hajnoczi, 2019/05/09