Re: [Qemu-block] [PATCH v1 2/2] arm: fsl-imx25: Add SD support

[Jean-Christophe DUBOIS]

Hello Peter,

Le 28/11/2015 21:50, Peter Crosthwaite a écrit :
> Add the two SD card controllers as the generic sysbus SDHCI device.
> Tested as sucessfully working with Linux 4.2. using the SD card for the
> root file system.

I guess the SDHCI device present in Qemu is (surprisingly) close enough 
to the i.MX version so that it works with a "generic" guest driver not 
using all device features which is nice.

But I am afraid the Freescale version is not 100% compatible. To me it 
looks like some registers are different or not supported in i.MX25.

I guess we could "fix it" later when we meet some different guest driver.

JC

> Signed-off-by: Peter Crosthwaite <address@hidden>
> ---
>
>   hw/arm/fsl-imx25.c         | 26 ++++++++++++++++++++++++++
>   include/hw/arm/fsl-imx25.h |  9 +++++++++
>   2 files changed, 35 insertions(+)
>
> diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c
> index e1cadac..9ccbd03 100644
> --- a/hw/arm/fsl-imx25.c
> +++ b/hw/arm/fsl-imx25.c
> @@ -68,6 +68,11 @@ static void fsl_imx25_init(Object *obj)
>           object_initialize(&s->gpio[i], sizeof(s->gpio[i]), TYPE_IMX_GPIO);
>           qdev_set_parent_bus(DEVICE(&s->gpio[i]), sysbus_get_default());
>       }
> +
> +    for (i = 0; i < FSL_IMX25_NUM_ESDHCS; i++) {
> +        object_initialize(&s->esdhc[i], sizeof(s->esdhc[i]), 
> TYPE_SYSBUS_SDHCI);
> +        qdev_set_parent_bus(DEVICE(&s->esdhc[i]), sysbus_get_default());
> +    }
>   }
>   
>   static void fsl_imx25_realize(DeviceState *dev, Error **errp)
> @@ -243,6 +248,27 @@ static void fsl_imx25_realize(DeviceState *dev, Error 
> **errp)
>                                               gpio_table[i].irq));
>       }
>   
> +    /* Initialize all eSDHCs */
> +    for (i = 0; i < FSL_IMX25_NUM_ESDHCS; i++) {
> +        static const struct {
> +            hwaddr addr;
> +            unsigned int irq;
> +        } esdhc_table[FSL_IMX25_NUM_ESDHCS] = {
> +            { FSL_IMX25_ESDHC1_ADDR, FSL_IMX25_ESDHC1_IRQ },
> +            { FSL_IMX25_ESDHC2_ADDR, FSL_IMX25_ESDHC2_IRQ }
> +        };
> +
> +        object_property_set_bool(OBJECT(&s->esdhc[i]), true, "realized", &err);
> +        if (err) {
> +            error_propagate(errp, err);
> +            return;
> +        }
> +        sysbus_mmio_map(SYS_BUS_DEVICE(&s->esdhc[i]), 0, esdhc_table[i].addr);
> +        sysbus_connect_irq(SYS_BUS_DEVICE(&s->esdhc[i]), 0,
> +                           qdev_get_gpio_in(DEVICE(&s->avic),
> +                                            esdhc_table[i].irq));
> +    }
> +
>       /* initialize 2 x 16 KB ROM */
>       memory_region_init_rom_device(&s->rom[0], NULL, NULL, NULL,
>                                     "imx25.rom0", FSL_IMX25_ROM0_SIZE, &err);
> diff --git a/include/hw/arm/fsl-imx25.h b/include/hw/arm/fsl-imx25.h
> index 73f50c6..ade4d42 100644
> --- a/include/hw/arm/fsl-imx25.h
> +++ b/include/hw/arm/fsl-imx25.h
> @@ -26,6 +26,7 @@
>   #include "hw/net/imx_fec.h"
>   #include "hw/i2c/imx_i2c.h"
>   #include "hw/gpio/imx_gpio.h"
> +#include "hw/sd/sdhci.h"
>   #include "exec/memory.h"
>   
>   #define TYPE_FSL_IMX25 "fsl,imx25"
> @@ -36,6 +37,7 @@
>   #define FSL_IMX25_NUM_EPITS 2
>   #define FSL_IMX25_NUM_I2CS 3
>   #define FSL_IMX25_NUM_GPIOS 4
> +#define FSL_IMX25_NUM_ESDHCS 2
>   
>   typedef struct FslIMX25State {
>       /*< private >*/
> @@ -51,6 +53,7 @@ typedef struct FslIMX25State {
>       IMXFECState    fec;
>       IMXI2CState    i2c[FSL_IMX25_NUM_I2CS];
>       IMXGPIOState   gpio[FSL_IMX25_NUM_GPIOS];
> +    SDHCIState     esdhc[2];
>       MemoryRegion   rom[2];
>       MemoryRegion   iram;
>       MemoryRegion   iram_alias;
> @@ -211,6 +214,10 @@ typedef struct FslIMX25State {
>   #define FSL_IMX25_GPIO4_SIZE    0x4000
>   #define FSL_IMX25_GPIO3_ADDR    0x53FA4000
>   #define FSL_IMX25_GPIO3_SIZE    0x4000
> +#define FSL_IMX25_ESDHC1_ADDR   0x53FB4000
> +#define FSL_IMX25_ESDHC1_SIZE   0x4000
> +#define FSL_IMX25_ESDHC2_ADDR   0x53FBB000
> +#define FSL_IMX25_ESDHC2_SIZE   0x4000
>   #define FSL_IMX25_GPIO1_ADDR    0x53FCC000
>   #define FSL_IMX25_GPIO1_SIZE    0x4000
>   #define FSL_IMX25_GPIO2_ADDR    0x53FD0000
> @@ -245,5 +252,7 @@ typedef struct FslIMX25State {
>   #define FSL_IMX25_GPIO2_IRQ     51
>   #define FSL_IMX25_GPIO3_IRQ     16
>   #define FSL_IMX25_GPIO4_IRQ     23
> +#define FSL_IMX25_ESDHC1_IRQ    9
> +#define FSL_IMX25_ESDHC2_IRQ    8
>   
>   #endif /* FSL_IMX25_H */