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[PATCH 11/33] tcg/wasm32: Add mov/movi instructions
From: |
Kohei Tokunaga |
Subject: |
[PATCH 11/33] tcg/wasm32: Add mov/movi instructions |
Date: |
Tue, 20 May 2025 21:51:13 +0900 |
This commit implements mov/movi instructions. The tcg_out_mov[i] functions
are used by several other functions and are intended to emit TCI code. So
they have been renamed to tcg_tci_out_mov[i].
Signed-off-by: Kohei Tokunaga <ktokunaga.mail@gmail.com>
---
tcg/wasm32/tcg-target.c.inc | 85 ++++++++++++++++++++++++++-----------
1 file changed, 60 insertions(+), 25 deletions(-)
diff --git a/tcg/wasm32/tcg-target.c.inc b/tcg/wasm32/tcg-target.c.inc
index 9b024b03b9..90a5705442 100644
--- a/tcg/wasm32/tcg-target.c.inc
+++ b/tcg/wasm32/tcg-target.c.inc
@@ -779,6 +779,28 @@ static void tcg_wasm_out_st16(TCGContext *s, TCGReg val,
tcg_wasm_out_op_i64_store16(s, 0, offset);
}
+static void tcg_wasm_out_mov(TCGContext *s, TCGReg ret, TCGReg arg)
+{
+ tcg_wasm_out_op_global_get_r(s, arg);
+ tcg_wasm_out_op_global_set_r(s, ret);
+}
+
+static void tcg_wasm_out_movi(TCGContext *s, TCGType type,
+ TCGReg ret, tcg_target_long arg)
+{
+ switch (type) {
+ case TCG_TYPE_I32:
+ tcg_wasm_out_op_i64_const(s, (int32_t)arg);
+ break;
+ case TCG_TYPE_I64:
+ tcg_wasm_out_op_i64_const(s, arg);
+ break;
+ default:
+ g_assert_not_reached();
+ }
+ tcg_wasm_out_op_global_set_r(s, ret);
+}
+
static bool patch_reloc(tcg_insn_unit *code_ptr_i, int type,
intptr_t value, intptr_t addend)
{
@@ -990,6 +1012,33 @@ static void tcg_out_op_rrrrrc(TCGContext *s, TCGOpcode op,
tcg_out32(s, insn);
}
+static void tcg_tci_out_movi(TCGContext *s, TCGType type,
+ TCGReg ret, tcg_target_long arg)
+{
+ switch (type) {
+ case TCG_TYPE_I32:
+#if TCG_TARGET_REG_BITS == 64
+ arg = (int32_t)arg;
+ /* fall through */
+ case TCG_TYPE_I64:
+#endif
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
+ if (arg == sextract32(arg, 0, 20)) {
+ tcg_out_op_ri(s, INDEX_op_tci_movi, ret, arg);
+ } else {
+ tcg_insn_unit_tci insn = 0;
+
+ new_pool_label(s, arg, 20, s->code_ptr, 0);
+ insn = deposit32(insn, 0, 8, INDEX_op_tci_movl);
+ insn = deposit32(insn, 8, 4, ret);
+ tcg_out32(s, insn);
+ }
+}
+
static void tcg_tci_out_extract(TCGContext *s, TCGType type, TCGReg rd,
TCGReg rs, unsigned pos, unsigned len)
{
@@ -1001,7 +1050,7 @@ static void tcg_out_ldst(TCGContext *s, TCGOpcode op,
TCGReg val,
{
stack_bounds_check(base, offset);
if (offset != sextract32(offset, 0, 16)) {
- tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP, offset);
+ tcg_tci_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP, offset);
tcg_out_op_rrr(s, INDEX_op_add, TCG_REG_TMP, TCG_REG_TMP, base);
base = TCG_REG_TMP;
offset = 0;
@@ -1021,37 +1070,23 @@ static void tcg_out_ld(TCGContext *s, TCGType type,
TCGReg val, TCGReg base,
tcg_wasm_out_ld(s, type, val, base, offset);
}
-static bool tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg)
+static void tcg_tci_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg
arg)
{
tcg_out_op_rr(s, INDEX_op_mov, ret, arg);
+}
+
+static bool tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg)
+{
+ tcg_tci_out_mov(s, type, ret, arg);
+ tcg_wasm_out_mov(s, ret, arg);
return true;
}
static void tcg_out_movi(TCGContext *s, TCGType type,
TCGReg ret, tcg_target_long arg)
{
- switch (type) {
- case TCG_TYPE_I32:
-#if TCG_TARGET_REG_BITS == 64
- arg = (int32_t)arg;
- /* fall through */
- case TCG_TYPE_I64:
-#endif
- break;
- default:
- g_assert_not_reached();
- }
-
- if (arg == sextract32(arg, 0, 20)) {
- tcg_out_op_ri(s, INDEX_op_tci_movi, ret, arg);
- } else {
- tcg_insn_unit insn = 0;
-
- new_pool_label(s, arg, 20, s->code_ptr, 0);
- insn = deposit32(insn, 0, 8, INDEX_op_tci_movl);
- insn = deposit32(insn, 8, 4, ret);
- tcg_out32(s, insn);
- }
+ tcg_tci_out_movi(s, type, ret, arg);
+ tcg_wasm_out_movi(s, type, ret, arg);
}
static void tcg_out_extract(TCGContext *s, TCGType type, TCGReg rd,
@@ -1133,7 +1168,7 @@ static void tcg_out_extu_i32_i64(TCGContext *s, TCGReg
rd, TCGReg rs)
static void tcg_out_extrl_i64_i32(TCGContext *s, TCGReg rd, TCGReg rs)
{
tcg_debug_assert(TCG_TARGET_REG_BITS == 64);
- tcg_out_mov(s, TCG_TYPE_I32, rd, rs);
+ tcg_tci_out_mov(s, TCG_TYPE_I32, rd, rs);
}
static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2)
--
2.43.0
- [PATCH 01/33] tcg: Fork TCI for wasm32 backend, (continued)
- [PATCH 01/33] tcg: Fork TCI for wasm32 backend, Kohei Tokunaga, 2025/05/20
- [PATCH 02/33] tcg/wasm32: Do not use TCI disassembler in Wasm backend, Kohei Tokunaga, 2025/05/20
- [PATCH 03/33] meson: Enable to build wasm backend, Kohei Tokunaga, 2025/05/20
- [PATCH 04/33] tcg/wasm32: Set TCG_TARGET_INSN_UNIT_SIZE to 1, Kohei Tokunaga, 2025/05/20
- [PATCH 05/33] tcg/wasm32: Add and/or/xor instructions, Kohei Tokunaga, 2025/05/20
- [PATCH 06/33] tcg/wasm32: Add add/sub/mul instructions, Kohei Tokunaga, 2025/05/20
- [PATCH 07/33] tcg/wasm32: Add shl/shr/sar instructions, Kohei Tokunaga, 2025/05/20
- [PATCH 08/33] tcg/wasm32: Add setcond/negsetcond/movcond instructions, Kohei Tokunaga, 2025/05/20
- [PATCH 09/33] tcg/wasm32: Add deposit/sextract/extract instrcutions, Kohei Tokunaga, 2025/05/20
- [PATCH 10/33] tcg/wasm32: Add load and store instructions, Kohei Tokunaga, 2025/05/20
- [PATCH 11/33] tcg/wasm32: Add mov/movi instructions,
Kohei Tokunaga <=
- [PATCH 12/33] tcg/wasm32: Add ext instructions, Kohei Tokunaga, 2025/05/20
- [PATCH 14/33] tcg/wasm32: Add rem/div instructions, Kohei Tokunaga, 2025/05/20
- [PATCH 13/33] tcg/wasm32: Add bswap instructions, Kohei Tokunaga, 2025/05/20
- [PATCH 16/33] tcg/wasm32: Add neg/not/ctpop instructions, Kohei Tokunaga, 2025/05/20
- [PATCH 18/33] tcg/wasm32: Add addc/subb instructions, Kohei Tokunaga, 2025/05/20
- [PATCH 17/33] tcg/wasm32: Add rot/clz/ctz instructions, Kohei Tokunaga, 2025/05/20
- [PATCH 15/33] tcg/wasm32: Add andc/orc/eqv/nand/nor instructions, Kohei Tokunaga, 2025/05/20
- [PATCH 19/33] tcg/wasm32: Add br/brcond instructions, Kohei Tokunaga, 2025/05/20
- [PATCH 21/33] tcg/wasm32: Add call instruction, Kohei Tokunaga, 2025/05/20
- [PATCH 23/33] include/exec: Allow using 64bit guest addresses on emscripten, Kohei Tokunaga, 2025/05/20