Re: [PATCH for-6.2 31/34] target/arm: Implement MVE VCTP

[Richard Henderson]

On 7/13/21 3:37 AM, Peter Maydell wrote:
> Implement the MVE VCTP insn, which sets the VPR.P0 predicate bits so
> as to predicate any element at index Rn or greater is predicated.  As
> with VPNOT, this insn itself is predicable and subject to beatwise
> execution.
>
> The calculation of the mask is the same as is used to determine
> ltpmask in mve_element_mask(), but we precalculate masklen in
> generated code to avoid having to have 4 helpers specialized by size.
>
> We put the decode line in with the low-overhead-loop insns in
> t32.decode because it's logically part of that collection of insn
> patterns, even though it is an MVE only insn.
>
> Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
> ---
>   target/arm/helper-mve.h    |  2 ++
>   target/arm/translate-a32.h |  1 +
>   target/arm/t32.decode      |  1 +
>   target/arm/mve_helper.c    | 20 ++++++++++++++++++++
>   target/arm/translate-mve.c |  2 +-
>   target/arm/translate.c     | 33 +++++++++++++++++++++++++++++++++
>   6 files changed, 58 insertions(+), 1 deletion(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~