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Re: [PATCH] aspeed: Add support for the quanta-q7l1-bmc board
From: |
Cédric Le Goater |
Subject: |
Re: [PATCH] aspeed: Add support for the quanta-q7l1-bmc board |
Date: |
Mon, 19 Apr 2021 14:43:45 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 |
On 4/16/21 7:38 PM, Patrick Venture wrote:
> On Fri, Apr 16, 2021 at 9:40 AM Cédric Le Goater <clg@kaod.org> wrote:
>>
>> Patrick,
>>
>> On 4/16/21 6:24 PM, Patrick Venture wrote:
>>> The Quanta-Q71l BMC board is a board supported by OpenBMC.
>>>
>>> Tested: Booted quanta-q71l firmware.
>>> Signed-off-by: Patrick Venture <venture@google.com>
>>> Reviewed-by: Hao Wu <wuhaotsh@google.com>
>>
>> This looks good.
>>
>> Reviewed-by: Cédric Le Goater <clg@kaod.org>
>>
>> Some comments below,
>>
>>
>>> ---
>>> hw/arm/aspeed.c | 62 +++++++++++++++++++++++++++++++++++++++++++++++++
>>> 1 file changed, 62 insertions(+)
>>>
>>> diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
>>> index a17b75f494..4611996d21 100644
>>> --- a/hw/arm/aspeed.c
>>> +++ b/hw/arm/aspeed.c
>>> @@ -138,6 +138,19 @@ struct AspeedMachineState {
>>> /* Witherspoon hardware value: 0xF10AD216 (but use romulus definition) */
>>> #define WITHERSPOON_BMC_HW_STRAP1 ROMULUS_BMC_HW_STRAP1
>>>
>>> +/* Quanta-Q71l hardware value */
>>> +#define QUANTA_Q71L_BMC_HW_STRAP1 ( \
>>> + SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \
>>> + SCU_AST2400_HW_STRAP_DRAM_CONFIG(2/* DDR3 with CL=6, CWL=5 */) | \
>>> + SCU_AST2400_HW_STRAP_ACPI_DIS | \
>>> + SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_24M_IN) | \
>>> + SCU_HW_STRAP_VGA_CLASS_CODE | \
>>> + SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_PASS_THROUGH) | \
>>> + SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1)
>>> | \
>>> + SCU_HW_STRAP_SPI_WIDTH | \
>>> + SCU_HW_STRAP_VGA_SIZE_SET(VGA_8M_DRAM) | \
>>> + SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
>>> +
>>> /* AST2600 evb hardware value */
>>> #define AST2600_EVB_HW_STRAP1 0x000000C0
>>> #define AST2600_EVB_HW_STRAP2 0x00000003
>>> @@ -433,6 +446,34 @@ static void palmetto_bmc_i2c_init(AspeedMachineState
>>> *bmc)
>>> object_property_set_int(OBJECT(dev), "temperature3", 110000,
>>> &error_abort);
>>> }
>>>
>>> +static void quanta_q71l_bmc_i2c_init(AspeedMachineState *bmc)
>>> +{
>>> + AspeedSoCState *soc = &bmc->soc;
>>> +
>>> + /*
>>> + * The quanta-q71l platform expects tmp75s which are compatible with
>>> + * tmp105s.
>>> + */
>>> + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105",
>>> 0x4c);
>>> + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105",
>>> 0x4e);
>>> + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105",
>>> 0x4f);
>>> +
>>> + /* TODO: i2c-1: Add baseboard FRU eeprom@54 24c64 */
>>
>> Why not add the eeprom devices ?
>
> I wanted to provide this ahead of filling it all out, I also have the
> pca954x staged, and some other devices to add. If you want, I can add
> those and make this into a patch series instead of a one-off.
This is s fine. Devices can come later. I have queued this machine for 6.1.
Thanks,
C.
>>
>>> + /* TODO: i2c-1: Add Frontpanel FRU eeprom@57 24c64 */
>>> + /* TODO: Add Memory Riser i2c mux and eeproms. */
>>> +
>>> + /* TODO: i2c-2: pca9546@74 */
>>> + /* TODO: i2c-2: pca9548@77 */
>>> + /* TODO: i2c-3: Add BIOS FRU eeprom@56 24c64 */
>>> + /* TODO: i2c-7: Add pca9546@70 */
>>> + /* - i2c@0: pmbus@59 */
>>> + /* - i2c@1: pmbus@58 */
>>> + /* - i2c@2: pmbus@58 */
>>> + /* - i2c@3: pmbus@59 */
>>> + /* TODO: i2c-7: Add PDB FRU eeprom@52 */
>>> + /* TODO: i2c-8: Add BMC FRU eeprom@50 */
>>> +}
>>> +
>>> static void ast2500_evb_i2c_init(AspeedMachineState *bmc)
>>> {
>>> AspeedSoCState *soc = &bmc->soc;
>>> @@ -728,6 +769,23 @@ static void
>>> aspeed_machine_palmetto_class_init(ObjectClass *oc, void *data)
>>> aspeed_soc_num_cpus(amc->soc_name);
>>> };
>>>
>>> +static void aspeed_machine_quanta_q71l_class_init(ObjectClass *oc, void
>>> *data)
>>> +{
>>> + MachineClass *mc = MACHINE_CLASS(oc);
>>> + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
>>> +
>>> + mc->desc = "Quanta-Q71l BMC (ARM926EJ-S)";
>>> + amc->soc_name = "ast2400-a1";
>>> + amc->hw_strap1 = QUANTA_Q71L_BMC_HW_STRAP1;
>>> + amc->fmc_model = "n25q256a";
>>> + amc->spi_model = "mx25l25635e";
>>> + amc->num_cs = 1;
>>> + amc->i2c_init = quanta_q71l_bmc_i2c_init;
>>> + mc->default_ram_size = 128 * MiB;
>>
>> I thought the board had more RAM ?
>
> It does not :( Trying to maintain OpenBMC with such little memory
> overhead has been less than fun, but it's do-able.
>
>>
>> Thanks,
>>
>> C.
>>
>>> + mc->default_cpus = mc->min_cpus = mc->max_cpus =
>>> + aspeed_soc_num_cpus(amc->soc_name);
>>> +}
>>> +
>>> static void aspeed_machine_supermicrox11_bmc_class_init(ObjectClass *oc,
>>> void *data)
>>> {
>>> @@ -927,6 +985,10 @@ static const TypeInfo aspeed_machine_types[] = {
>>> .name = MACHINE_TYPE_NAME("g220a-bmc"),
>>> .parent = TYPE_ASPEED_MACHINE,
>>> .class_init = aspeed_machine_g220a_class_init,
>>> + }, {
>>> + .name = MACHINE_TYPE_NAME("quanta-q71l-bmc"),
>>> + .parent = TYPE_ASPEED_MACHINE,
>>> + .class_init = aspeed_machine_quanta_q71l_class_init,
>>> }, {
>>> .name = TYPE_ASPEED_MACHINE,
>>> .parent = TYPE_MACHINE,
>>>
>>