Re: [PATCH v2 1/3] target/arm: Restrict v8M IDAU to TCG

[Claudio Fontana]

On 3/9/21 3:18 PM, Philippe Mathieu-Daudé wrote:
> On 3/9/21 2:41 PM, Claudio Fontana wrote:
>> On 2/21/21 11:26 PM, Philippe Mathieu-Daudé wrote:
>>> IDAU is specific to M-profile. KVM only supports A-profile.
>>> Restrict this interface to TCG, as it is pointless (and
>>> confusing) on a KVM-only build.
>>>
>>> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>>> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
>>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>>
>>
>> This one breaks the KVM tests hard though (most of them).
>>
>> I will try to figure out why.
>>
>> Ciao,
>>
>> Claudio
>>
>>
>>> ---
>>>  target/arm/cpu.c     | 7 -------
>>>  target/arm/cpu_tcg.c | 8 ++++++++
>>>  2 files changed, 8 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
>>> index b8bc89e71fc..a772fd4926f 100644
>>> --- a/target/arm/cpu.c
>>> +++ b/target/arm/cpu.c
>>> @@ -2380,12 +2380,6 @@ static const TypeInfo arm_cpu_type_info = {
>>>      .class_init = arm_cpu_class_init,
>>>  };
>>>  
>>> -static const TypeInfo idau_interface_type_info = {
>>> -    .name = TYPE_IDAU_INTERFACE,
>>> -    .parent = TYPE_INTERFACE,
> 
> Hmm this is an interface...
> 
> Is a CPU/machine trying to resolve it?

I think that qtests assume the interface to be there.

device-introspection-test for sure, but apparently many others too..

RFC v5 is out now,

Ciao,

Claudio

> 
>>> -    .class_size = sizeof(IDAUInterfaceClass),
>>> -};
>>> -
>>>  static void arm_cpu_register_types(void)
>>>  {
>>>      const size_t cpu_count = ARRAY_SIZE(arm_cpus);
>>> @@ -2399,7 +2393,6 @@ static void arm_cpu_register_types(void)
>>>      if (cpu_count) {
>>>          size_t i;
>>>  
>>> -        type_register_static(&idau_interface_type_info);
>>>          for (i = 0; i < cpu_count; ++i) {
>>>              arm_cpu_register(&arm_cpus[i]);
>>>          }
>>> diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c
>>> index c29b434c60d..fb07a336939 100644
>>> --- a/target/arm/cpu_tcg.c
>>> +++ b/target/arm/cpu_tcg.c
>>> @@ -14,6 +14,7 @@
>>>  #include "hw/core/tcg-cpu-ops.h"
>>>  #endif /* CONFIG_TCG */
>>>  #include "internals.h"
>>> +#include "target/arm/idau.h"
>>>  
>>>  /* CPU models. These are not needed for the AArch64 linux-user build. */
>>>  #if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
>>> @@ -739,10 +740,17 @@ static const ARMCPUInfo arm_tcg_cpus[] = {
>>>      { .name = "pxa270-c5",   .initfn = pxa270c5_initfn },
>>>  };
>>>  
>>> +static const TypeInfo idau_interface_type_info = {
>>> +    .name = TYPE_IDAU_INTERFACE,
>>> +    .parent = TYPE_INTERFACE,
>>> +    .class_size = sizeof(IDAUInterfaceClass),
>>> +};
>>> +
>>>  static void arm_tcg_cpu_register_types(void)
>>>  {
>>>      size_t i;
>>>  
>>> +    type_register_static(&idau_interface_type_info);
>>>      for (i = 0; i < ARRAY_SIZE(arm_tcg_cpus); ++i) {
>>>          arm_cpu_register(&arm_tcg_cpus[i]);
>>>      }
>>>
>>
>>
>