Re: [PATCH 14/44] hw/misc/iotkit-sysctl: Handle CPU_WAIT, NMI_ENABLE for SSE-300

[Richard Henderson]

On 2/19/21 6:45 AM, Peter Maydell wrote:
> In the SSE-300 the CPU_WAIT and NMI_ENABLE registers have
> moved offsets, so they are now where the SSE-200's WICCTRL
> and EWCTRL were. The SSE-300 does not have WICCTLR or EWCTRL
> at all, and the old offsets are reserved:
>
>   Offset    SSE-200      SSE-300
> -----------------------------------
>   0x118     CPUWAIT      reserved
>   0x118     NMI_ENABLE   reserved

    0x11c

>   0x120     WICCTRL      CPUWAIT
>   0x124     EWCTRL       NMI_ENABLE
>
> Handle this reshuffle, and the fact that SSE-300 has only
> one CPU and so only one active bit in CPUWAIT.
>
> Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
> ---

What an irritating and pointless change.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~