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regression in TCG emulation of VTBL neon instruction


From: Ard Biesheuvel
Subject: regression in TCG emulation of VTBL neon instruction
Date: Mon, 2 Nov 2020 08:54:16 +0100

Hello all,

I spotted an issue with the TCG emulation of VTBL instructions in 32-bit mode.

It seems that when using the 4 register version, indexes in the range
[0x10 .. 0x1f] are not handled correctly, and I end up with all zero
vectors in the output.

For example, I am optimizing Linux's NEON ChaCha20 implementation to
use overlapping loads and stores, and this requires the final cipher
stream block to be shifted accordingly, using a sequence such as

vtbl.8 d4, {q4-q5}, d4
vtbl.8 d5, {q4-q5}, d5
vtbl.8 d6, {q4-q5}, d6
vtbl.8 d7, {q4-q5}, d7

where q4-q5 contain 32 bytes of cipher stream, and d4-d7 contain a set
of permutation vectors, where each value is in the range [0x0, 0x1f].

The above works fine with older QEMU and KVM, but with recent QEMU,
this fails, seemingly because d6 and d7 always turn up as all zeros.

This can be reproduced by running the zImage I prepared [0] as follows:

qemu-system-aarch64 -M virt -cpu cortex-a15 -m 2048 -net none
-nographic -kernel arch/arm/boot/zImage

and it will print the following (somewhere halfway down the kernel
log) on the affected builds of QEMU:

alg: skcipher: chacha20-neon encryption test failed (wrong result) on
test vector 1, cfg="in-place"
alg: skcipher: xchacha20-neon encryption test failed (wrong result) on
test vector 1, cfg="in-place"
alg: skcipher: xchacha12-neon encryption test failed (wrong result) on
test vector 1, cfg="in-place"



[0] https://people.linaro.org/~ard.biesheuvel/qemu-tcg-vtbl/zImage



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