qemu-arm
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v3 12/16] hw/arm: xlnx: Set all boards' GEM 'phy-addr' proper


From: Alistair Francis
Subject: Re: [PATCH v3 12/16] hw/arm: xlnx: Set all boards' GEM 'phy-addr' property value to 23
Date: Tue, 1 Sep 2020 17:16:50 -0700

On Mon, Aug 31, 2020 at 6:50 PM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> From: Bin Meng <bin.meng@windriver.com>
>
> When cadence_gem model was created for Xilinx boards, the PHY address
> was hard-coded to 23 in the GEM model. Now that we have introduced a
> property we can use that to tell GEM model what our PHY address is.
> Change all boards' GEM 'phy-addr' property value to 23, and set the
> PHY address default value to 0 in the GEM model.
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

>
> ---
>
> Changes in v3:
> - use the correct (Object *) to set the 'phy-addr' in xlnx-zynqmp.c
>
>  hw/arm/xilinx_zynq.c | 1 +
>  hw/arm/xlnx-versal.c | 1 +
>  hw/arm/xlnx-zynqmp.c | 2 ++
>  hw/net/cadence_gem.c | 6 +++---
>  4 files changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
> index 969ef07..9ffcc56 100644
> --- a/hw/arm/xilinx_zynq.c
> +++ b/hw/arm/xilinx_zynq.c
> @@ -119,6 +119,7 @@ static void gem_init(NICInfo *nd, uint32_t base, qemu_irq 
> irq)
>          qemu_check_nic_model(nd, TYPE_CADENCE_GEM);
>          qdev_set_nic_properties(dev, nd);
>      }
> +    object_property_set_int(OBJECT(dev), "phy-addr", 23, &error_abort);
>      s = SYS_BUS_DEVICE(dev);
>      sysbus_realize_and_unref(s, &error_fatal);
>      sysbus_mmio_map(s, 0, base);
> diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
> index e3aa4bd..12ba6c4 100644
> --- a/hw/arm/xlnx-versal.c
> +++ b/hw/arm/xlnx-versal.c
> @@ -165,6 +165,7 @@ static void versal_create_gems(Versal *s, qemu_irq *pic)
>              qemu_check_nic_model(nd, "cadence_gem");
>              qdev_set_nic_properties(dev, nd);
>          }
> +        object_property_set_int(OBJECT(dev), "phy-addr", 23, &error_abort);
>          object_property_set_int(OBJECT(dev), "num-priority-queues", 2,
>                                  &error_abort);
>          object_property_set_link(OBJECT(dev), "dma", OBJECT(&s->mr_ps),
> diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
> index c435b9d..7885bb1 100644
> --- a/hw/arm/xlnx-zynqmp.c
> +++ b/hw/arm/xlnx-zynqmp.c
> @@ -460,6 +460,8 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error 
> **errp)
>          }
>          object_property_set_int(OBJECT(&s->gem[i]), "revision", GEM_REVISION,
>                                  &error_abort);
> +        object_property_set_int(OBJECT(&s->gem[i]), "phy-addr", 23,
> +                                &error_abort);
>          object_property_set_int(OBJECT(&s->gem[i]), "num-priority-queues", 2,
>                                  &error_abort);
>          if (!sysbus_realize(SYS_BUS_DEVICE(&s->gem[i]), errp)) {
> diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
> index d80096b..7a53469 100644
> --- a/hw/net/cadence_gem.c
> +++ b/hw/net/cadence_gem.c
> @@ -250,7 +250,7 @@
>  #define GEM_PHYMNTNC_REG_SHIFT 18
>
>  /* Marvell PHY definitions */
> -#define BOARD_PHY_ADDRESS    23 /* PHY address we will emulate a device at */
> +#define BOARD_PHY_ADDRESS    0 /* PHY address we will emulate a device at */
>
>  #define PHY_REG_CONTROL      0
>  #define PHY_REG_STATUS       1
> @@ -1446,7 +1446,7 @@ static uint64_t gem_read(void *opaque, hwaddr offset, 
> unsigned size)
>              uint32_t phy_addr, reg_num;
>
>              phy_addr = (retval & GEM_PHYMNTNC_ADDR) >> 
> GEM_PHYMNTNC_ADDR_SHFT;
> -            if (phy_addr == s->phy_addr || phy_addr == 0) {
> +            if (phy_addr == s->phy_addr) {
>                  reg_num = (retval & GEM_PHYMNTNC_REG) >> 
> GEM_PHYMNTNC_REG_SHIFT;
>                  retval &= 0xFFFF0000;
>                  retval |= gem_phy_read(s, reg_num);
> @@ -1569,7 +1569,7 @@ static void gem_write(void *opaque, hwaddr offset, 
> uint64_t val,
>              uint32_t phy_addr, reg_num;
>
>              phy_addr = (val & GEM_PHYMNTNC_ADDR) >> GEM_PHYMNTNC_ADDR_SHFT;
> -            if (phy_addr == s->phy_addr || phy_addr == 0) {
> +            if (phy_addr == s->phy_addr) {
>                  reg_num = (val & GEM_PHYMNTNC_REG) >> GEM_PHYMNTNC_REG_SHIFT;
>                  gem_phy_write(s, reg_num, val);
>              }
> --
> 2.7.4
>
>



reply via email to

[Prev in Thread] Current Thread [Next in Thread]