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[PATCH v2 13/45] target/arm: Make VFP_CONV_FIX macros take separate floa
From: |
Peter Maydell |
Subject: |
[PATCH v2 13/45] target/arm: Make VFP_CONV_FIX macros take separate float type and float size |
Date: |
Fri, 28 Aug 2020 19:33:22 +0100 |
Currently the VFP_CONV_FIX macros take a single fsz argument for the
size of the float type, which is used both to select the name of
the functions to call (eg float32_is_any_nan()) and also for the
type to use for the float inputs and outputs (eg float32).
Separate these into fsz and ftype arguments, so that we can use them
for fp16, which uses 'float16' in the function names but is still
passing inputs and outputs in a 32-bit sized type.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/vfp_helper.c | 46 ++++++++++++++++++++---------------------
1 file changed, 23 insertions(+), 23 deletions(-)
diff --git a/target/arm/vfp_helper.c b/target/arm/vfp_helper.c
index 55aa38f0ce8..7650890d440 100644
--- a/target/arm/vfp_helper.c
+++ b/target/arm/vfp_helper.c
@@ -394,13 +394,13 @@ float32 VFP_HELPER(fcvts, d)(float64 x, CPUARMState *env)
}
/* VFP3 fixed point conversion. */
-#define VFP_CONV_FIX_FLOAT(name, p, fsz, isz, itype) \
-float##fsz HELPER(vfp_##name##to##p)(uint##isz##_t x, uint32_t shift, \
+#define VFP_CONV_FIX_FLOAT(name, p, fsz, ftype, isz, itype) \
+ftype HELPER(vfp_##name##to##p)(uint##isz##_t x, uint32_t shift, \
void *fpstp) \
{ return itype##_to_##float##fsz##_scalbn(x, -shift, fpstp); }
-#define VFP_CONV_FLOAT_FIX_ROUND(name, p, fsz, isz, itype, ROUND, suff) \
-uint##isz##_t HELPER(vfp_to##name##p##suff)(float##fsz x, uint32_t shift, \
+#define VFP_CONV_FLOAT_FIX_ROUND(name, p, fsz, ftype, isz, itype, ROUND, suff)
\
+uint##isz##_t HELPER(vfp_to##name##p##suff)(ftype x, uint32_t shift, \
void *fpst) \
{ \
if (unlikely(float##fsz##_is_any_nan(x))) { \
@@ -410,30 +410,30 @@ uint##isz##_t HELPER(vfp_to##name##p##suff)(float##fsz x,
uint32_t shift, \
return float##fsz##_to_##itype##_scalbn(x, ROUND, shift, fpst); \
}
-#define VFP_CONV_FIX(name, p, fsz, isz, itype) \
-VFP_CONV_FIX_FLOAT(name, p, fsz, isz, itype) \
-VFP_CONV_FLOAT_FIX_ROUND(name, p, fsz, isz, itype, \
+#define VFP_CONV_FIX(name, p, fsz, ftype, isz, itype) \
+VFP_CONV_FIX_FLOAT(name, p, fsz, ftype, isz, itype) \
+VFP_CONV_FLOAT_FIX_ROUND(name, p, fsz, ftype, isz, itype, \
float_round_to_zero, _round_to_zero) \
-VFP_CONV_FLOAT_FIX_ROUND(name, p, fsz, isz, itype, \
+VFP_CONV_FLOAT_FIX_ROUND(name, p, fsz, ftype, isz, itype, \
get_float_rounding_mode(fpst), )
-#define VFP_CONV_FIX_A64(name, p, fsz, isz, itype) \
-VFP_CONV_FIX_FLOAT(name, p, fsz, isz, itype) \
-VFP_CONV_FLOAT_FIX_ROUND(name, p, fsz, isz, itype, \
+#define VFP_CONV_FIX_A64(name, p, fsz, ftype, isz, itype) \
+VFP_CONV_FIX_FLOAT(name, p, fsz, ftype, isz, itype) \
+VFP_CONV_FLOAT_FIX_ROUND(name, p, fsz, ftype, isz, itype, \
get_float_rounding_mode(fpst), )
-VFP_CONV_FIX(sh, d, 64, 64, int16)
-VFP_CONV_FIX(sl, d, 64, 64, int32)
-VFP_CONV_FIX_A64(sq, d, 64, 64, int64)
-VFP_CONV_FIX(uh, d, 64, 64, uint16)
-VFP_CONV_FIX(ul, d, 64, 64, uint32)
-VFP_CONV_FIX_A64(uq, d, 64, 64, uint64)
-VFP_CONV_FIX(sh, s, 32, 32, int16)
-VFP_CONV_FIX(sl, s, 32, 32, int32)
-VFP_CONV_FIX_A64(sq, s, 32, 64, int64)
-VFP_CONV_FIX(uh, s, 32, 32, uint16)
-VFP_CONV_FIX(ul, s, 32, 32, uint32)
-VFP_CONV_FIX_A64(uq, s, 32, 64, uint64)
+VFP_CONV_FIX(sh, d, 64, float64, 64, int16)
+VFP_CONV_FIX(sl, d, 64, float64, 64, int32)
+VFP_CONV_FIX_A64(sq, d, 64, float64, 64, int64)
+VFP_CONV_FIX(uh, d, 64, float64, 64, uint16)
+VFP_CONV_FIX(ul, d, 64, float64, 64, uint32)
+VFP_CONV_FIX_A64(uq, d, 64, float64, 64, uint64)
+VFP_CONV_FIX(sh, s, 32, float32, 32, int16)
+VFP_CONV_FIX(sl, s, 32, float32, 32, int32)
+VFP_CONV_FIX_A64(sq, s, 32, float32, 64, int64)
+VFP_CONV_FIX(uh, s, 32, float32, 32, uint16)
+VFP_CONV_FIX(ul, s, 32, float32, 32, uint32)
+VFP_CONV_FIX_A64(uq, s, 32, float32, 64, uint64)
#undef VFP_CONV_FIX
#undef VFP_CONV_FIX_FLOAT
--
2.20.1
- [PATCH v2 03/45] target/arm: Implement VFP fp16 for VFP_BINOP operations, (continued)
- [PATCH v2 03/45] target/arm: Implement VFP fp16 for VFP_BINOP operations, Peter Maydell, 2020/08/28
- [PATCH v2 01/45] target/arm: Remove local definitions of float constants, Peter Maydell, 2020/08/28
- [PATCH v2 04/45] target/arm: Implement VFP fp16 VMLA, VMLS, VNMLS, VNMLA, VNMUL, Peter Maydell, 2020/08/28
- [PATCH v2 02/45] target/arm: Use correct ID register check for aa32_fp16_arith, Peter Maydell, 2020/08/28
- [PATCH v2 07/45] target/arm: Macroify uses of do_vfp_2op_sp() and do_vfp_2op_dp(), Peter Maydell, 2020/08/28
- [PATCH v2 09/45] target/arm: Implement VFP fp16 for VMOV immediate, Peter Maydell, 2020/08/28
- [PATCH v2 05/45] target/arm: Macroify trans functions for VFMA, VFMS, VFNMA, VFNMS, Peter Maydell, 2020/08/28
- [PATCH v2 10/45] target/arm: Implement VFP fp16 VCMP, Peter Maydell, 2020/08/28
- [PATCH v2 08/45] target/arm: Implement VFP fp16 for VABS, VNEG, VSQRT, Peter Maydell, 2020/08/28
- [PATCH v2 12/45] target/arm: Implement VFP fp16 VCVT between float and integer, Peter Maydell, 2020/08/28
- [PATCH v2 13/45] target/arm: Make VFP_CONV_FIX macros take separate float type and float size,
Peter Maydell <=
- [PATCH v2 11/45] target/arm: Implement VFP fp16 VLDR and VSTR, Peter Maydell, 2020/08/28
- [PATCH v2 14/45] target/arm: Use macros instead of open-coding fp16 conversion helpers, Peter Maydell, 2020/08/28
- [PATCH v2 15/45] target/arm: Implement VFP fp16 VCVT between float and fixed-point, Peter Maydell, 2020/08/28
- [PATCH v2 16/45] target/arm: Implement VFP vp16 VCVT-with-specified-rounding-mode, Peter Maydell, 2020/08/28
- [PATCH v2 18/45] target/arm: Implement VFP fp16 VRINT*, Peter Maydell, 2020/08/28
- [PATCH v2 21/45] target/arm: Implement VFP fp16 VMOV between gp and halfprec registers, Peter Maydell, 2020/08/28
- [PATCH v2 17/45] target/arm: Implement VFP fp16 VSEL, Peter Maydell, 2020/08/28
- [PATCH v2 19/45] target/arm: Implement new VFP fp16 insn VINS, Peter Maydell, 2020/08/28
- [PATCH v2 22/45] fpu: Add float16 comparison functions, Peter Maydell, 2020/08/28