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Re: [PATCH 20/22] target/arm: Implement new VFP fp16 insn VMOVX


From: Richard Henderson
Subject: Re: [PATCH 20/22] target/arm: Implement new VFP fp16 insn VMOVX
Date: Tue, 25 Aug 2020 12:25:27 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0

On 8/24/20 7:29 AM, Peter Maydell wrote:
> The fp16 extension includes a new instruction VMOVX, which copies the
> upper 16 bits of a 32-bit source VFP register into the lower 16
> bits of the destination and zeroes the high half of the destination.
> Implement it.
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  target/arm/vfp-uncond.decode   |  3 +++
>  target/arm/translate-vfp.c.inc | 25 +++++++++++++++++++++++++
>  2 files changed, 28 insertions(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~



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