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v8.1M cpu emulation and target-arm feature-identification strategy

From: Peter Maydell
Subject: v8.1M cpu emulation and target-arm feature-identification strategy
Date: Wed, 5 Aug 2020 12:08:13 +0100

Mostly recently we've been aiming for QEMU emulation code in
target/arm to use ID register fields to determine whether a
feature is present or not (the isar_feature_* functions) rather
than the old style of defining ARM_FEATURE_* flags. This seems to
be working out well for A-profile. However, for v8.1M there are
a small handful of minor behaviour differences which don't have an
associated ID register field, but which are instead in the spec
and pseudocode just called out as "if this is a v8.1M CPU".
(The major v8.1M new features do have ID register fields.)

I can think of two ways to handle this:
 (1) define an ARM_FEATURE_V81M flag
 (2) define an isar_feature_aa32_v81m() function which under the
     hood is actually testing for a specific feature which happens
     to be known to be always present in v8.1M, like low-overhead-branches
     (ie ID_ISAR0.CmpBranch >=3)

Any preferences ?

-- PMM

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