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Re: [PATCH v6 00/13] Add Nuvoton NPCM730/NPCM750 SoCs and two BMC machin
Re: [PATCH v6 00/13] Add Nuvoton NPCM730/NPCM750 SoCs and two BMC machines
Fri, 17 Jul 2020 19:17:45 -0700
On Fri, Jul 17, 2020 at 1:32 PM Cédric Le Goater <email@example.com> wrote:
> On 7/17/20 8:02 AM, Havard Skinnemoen wrote:
> > I also pushed this and the previous two patchsets to my qemu fork on github.
> > The branches are named npcm7xx-v[1-6].
> > https://github.com/hskinnemoen/qemu
> > This patch series models enough of the Nuvoton NPCM730 and NPCM750 SoCs to
> > boot
> > an OpenBMC image built for quanta-gsj. This includes device models for:
> > - Global Configuration Registers
> > - Clock Control
> > - Timers
> > - Fuses
> > - Memory Controller
> > - Flash Controller
> > These modules, along with the existing Cortex A9 CPU cores and built-in
> > peripherals, are integrated into a NPCM730 or NPCM750 SoC, which in turn
> > form
> > the foundation for the quanta-gsj and npcm750-evb machines, respectively.
> > The
> > two SoCs are very similar; the only difference is that NPCM730 is missing
> > some
> > peripherals that NPCM750 has, and which are not considered essential for
> > datacenter use (e.g. graphics controllers). For more information, see
> > https://www.nuvoton.com/products/cloud-computing/ibmc/
> > Both quanta-gsj and npcm750-evb correspond to real boards supported by
> > OpenBMC.
> > At the end of the series, qemu can boot an OpenBMC image built for one of
> > these
> > boards with some minor modifications.
> > The patches in this series were developed by Google and reviewed by
> > Nuvoton. We
> > will be maintaining the machine and peripheral support together.
> > The data sheet for these SoCs is not generally available. Please let me
> > know if
> > more comments are needed to understand the device behavior.
> I think this series is ready to go.
> Patch 6 "roms: Add virtual Boot ROM for NPCM7xx SoCs" needs a few
> add-ons which can come later.
> Patch 13 "tests/acceptance: console boot tests for quanta-gsj" needs
> an Acked-by by our test gurus. Aspeed needs the same kind of tests
> if possible. It depends on the pressure that the QEMU CI will put on
> the web servers hosting the images.
Hmm, I didn't expect this to be a problem when hosting the images on github...?
> I think that the rest of the comments are minor and can be fixed
> as follow-ups when 5.2 is being assembled.
Great! Thanks a lot for reviewing and testing.
I've incorporated the feedback I got today, but I'm keeping them as
separate commits for now. I can either fold them into a v7 series or
post them as follow-ups.
- [PATCH v6 08/13] hw/nvram: NPCM7xx OTP device model, (continued)
- [PATCH v6 08/13] hw/nvram: NPCM7xx OTP device model, Havard Skinnemoen, 2020/07/17
- [PATCH v6 10/13] hw/ssi: NPCM7xx Flash Interface Unit device model, Havard Skinnemoen, 2020/07/17
- [PATCH v6 11/13] hw/arm: Wire up BMC boot flash for npcm750-evb and quanta-gsj, Havard Skinnemoen, 2020/07/17
- [PATCH v6 09/13] hw/mem: Stubbed out NPCM7xx Memory Controller model, Havard Skinnemoen, 2020/07/17
- [PATCH v6 12/13] docs/system: Add Nuvoton machine documentation, Havard Skinnemoen, 2020/07/17
- [PATCH v6 13/13] tests/acceptance: console boot tests for quanta-gsj, Havard Skinnemoen, 2020/07/17
- Re: [PATCH v6 00/13] Add Nuvoton NPCM730/NPCM750 SoCs and two BMC machines, Cédric Le Goater, 2020/07/17
- Re: [PATCH v6 00/13] Add Nuvoton NPCM730/NPCM750 SoCs and two BMC machines,
Havard Skinnemoen <=