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[Qemu-devel] [PATCH 10/20] nvic: Add NS alias SCS region


From: Magdy, Mina
Subject: [Qemu-devel] [PATCH 10/20] nvic: Add NS alias SCS region
Date: Sun, 31 May 2020 05:32:11 +0000

Hello all,

 

I hope everything is going well with you.

I’m currently going through this QEMU patch that related to adding the NS alias for SCS region in ARMv8m cores.

 

So I’ve an enquiry about this code modification, if possible.

 

Why did you assumed that secure accesses to the alias act like NS accesses to the real region registers. I discovered the any register that is accessed through its alias address behaves like accessing it in no secure state (except some cases where current security state is also considered along with the accessed region) ?

 

My question was come up due to an issue while setting Application Interrupt and Reset Control Register (AIRCR). BFHFNMINS , I tried to set in secure state  but through the alias register. But as investigated from QEMU code, the current security state is set to 0 (no secure) but the CPU state is still secure and wasn’t switched at this point.

So any help for this issue. I really appreciate your help and your consideration.

 

Best Regards,
Mina.

 


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