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Re: [PATCH v2] target/arm: Implement SVE2 scatter store insns
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From: |
Richard Henderson |
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Subject: |
Re: [PATCH v2] target/arm: Implement SVE2 scatter store insns |
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Date: |
Fri, 24 Apr 2020 13:06:04 -0700 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 |
On 4/22/20 7:15 AM, Stephen Long wrote:
> Add decoding logic for SVE2 64-bit/32-bit scatter non-temporal store
> insns.
>
> 64-bit
> * STNT1B (vector plus scalar)
> * STNT1H (vector plus scalar)
> * STNT1W (vector plus scalar)
> * STNT1D (vector plus scalar)
>
> 32-bit
> * STNT1B (vector plus scalar)
> * STNT1H (vector plus scalar)
> * STNT1W (vector plus scalar)
>
> Signed-off-by: Stephen Long <address@hidden>
>
> Cool, it seemed to typedef correctly.
> ---
> target/arm/sve.decode | 10 ++++++++++
> target/arm/translate-sve.c | 8 ++++++++
> 2 files changed, 18 insertions(+)
Applied to my SVE2 branch. Thanks!
r~