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[PATCH 28/31] target/arm: Implement SVE2 bitwise shift and insert
From: |
Richard Henderson |
Subject: |
[PATCH 28/31] target/arm: Implement SVE2 bitwise shift and insert |
Date: |
Thu, 26 Mar 2020 16:08:35 -0700 |
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/sve.decode | 5 +++++
target/arm/translate-sve.c | 10 ++++++++++
2 files changed, 15 insertions(+)
diff --git a/target/arm/sve.decode b/target/arm/sve.decode
index 756f939df1..9bf66e8ad4 100644
--- a/target/arm/sve.decode
+++ b/target/arm/sve.decode
@@ -1261,3 +1261,8 @@ SSRA 01000101 .. 0 ..... 1110 00 ..... .....
@rd_rn_tszimm_shr
USRA 01000101 .. 0 ..... 1110 01 ..... ..... @rd_rn_tszimm_shr
SRSRA 01000101 .. 0 ..... 1110 10 ..... ..... @rd_rn_tszimm_shr
URSRA 01000101 .. 0 ..... 1110 11 ..... ..... @rd_rn_tszimm_shr
+
+## SVE2 bitwise shift and insert
+
+SRI 01000101 .. 0 ..... 11110 0 ..... ..... @rd_rn_tszimm_shr
+SLI 01000101 .. 0 ..... 11110 1 ..... ..... @rd_rn_tszimm_shl
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index 1d1f55dfdd..7556cecfb3 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -6351,3 +6351,13 @@ static bool trans_URSRA(DisasContext *s, arg_rri_esz *a)
{
return do_sve2_fn2i(s, a, arm_gen_gvec_ursra);
}
+
+static bool trans_SRI(DisasContext *s, arg_rri_esz *a)
+{
+ return do_sve2_fn2i(s, a, arm_gen_gvec_sri);
+}
+
+static bool trans_SLI(DisasContext *s, arg_rri_esz *a)
+{
+ return do_sve2_fn2i(s, a, arm_gen_gvec_sli);
+}
--
2.20.1
- [PATCH 18/31] target/arm: Implement SVE2 bitwise exclusive-or interleaved, (continued)
- [PATCH 18/31] target/arm: Implement SVE2 bitwise exclusive-or interleaved, Richard Henderson, 2020/03/26
- [PATCH 19/31] target/arm: Implement SVE2 bitwise permute, Richard Henderson, 2020/03/26
- [PATCH 20/31] target/arm: Implement SVE2 complex integer add, Richard Henderson, 2020/03/26
- [PATCH 22/31] target/arm: Implement SVE2 integer add/subtract long with carry, Richard Henderson, 2020/03/26
- [PATCH 21/31] target/arm: Implement SVE2 integer absolute difference and accumulate long, Richard Henderson, 2020/03/26
- [PATCH 25/31] target/arm: Implement SVE2 bitwise shift right and accumulate, Richard Henderson, 2020/03/26
- [PATCH 29/31] target/arm: Vectorize SABD/UABD, Richard Henderson, 2020/03/26
- [PATCH 23/31] target/arm: Create arm_gen_gvec_[us]sra, Richard Henderson, 2020/03/26
- [PATCH 24/31] target/arm: Create arm_gen_gvec_{u,s}{rshr,rsra}, Richard Henderson, 2020/03/26
- [PATCH 27/31] target/arm: Tidy handle_vec_simd_shri, Richard Henderson, 2020/03/26
- [PATCH 28/31] target/arm: Implement SVE2 bitwise shift and insert,
Richard Henderson <=
- [PATCH 26/31] target/arm: Create arm_gen_gvec_{sri,sli}, Richard Henderson, 2020/03/26
- [PATCH 30/31] target/arm: Vectorize SABA/UABA, Richard Henderson, 2020/03/26
- [PATCH 31/31] target/arm: Implement SVE2 integer absolute difference and accumulate, Richard Henderson, 2020/03/26