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[PATCH 06/13] target/arm: Use FIELD macros for clearing ID_DFR0 PERFMON
From: |
Peter Maydell |
Subject: |
[PATCH 06/13] target/arm: Use FIELD macros for clearing ID_DFR0 PERFMON field |
Date: |
Tue, 11 Feb 2020 17:37:19 +0000 |
We already define FIELD macros for ID_DFR0, so use them in the
one place where we're doing direct bit value manipulation.
Signed-off-by: Peter Maydell <address@hidden>
---
We have lots of this non-FIELD style in the code, of course;
I change this one purely because it otherwise looks a bit odd
sat next to the ID_AA64DFR0 line that was changed in the previous
patch...
---
target/arm/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index dc582da8fa4..e7858b073b5 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1603,7 +1603,7 @@ static void arm_cpu_realizefn(DeviceState *dev, Error
**errp)
#endif
} else {
cpu->id_aa64dfr0 = FIELD_DP32(cpu->id_aa64dfr0, ID_AA64DFR0, PMUVER,
0);
- cpu->id_dfr0 &= ~(0xf << 24);
+ cpu->id_dfr0 = FIELD_DP32(cpu->id_dfr0, ID_DFR0, PERFMON, 0);
cpu->pmceid0 = 0;
cpu->pmceid1 = 0;
}
--
2.20.1
- [PATCH 00/13] arm: Implement ARMv8.1-PMU and ARMv8.4-PMU, Peter Maydell, 2020/02/11
- [PATCH 03/13] target/arm: Define and use any_predinv isar_feature test, Peter Maydell, 2020/02/11
- [PATCH 02/13] target/arm: Add isar_feature_any_fp16 and document naming/usage conventions, Peter Maydell, 2020/02/11
- [PATCH 06/13] target/arm: Use FIELD macros for clearing ID_DFR0 PERFMON field,
Peter Maydell <=
- [PATCH 09/13] target/arm: Implement ARMv8.1-PMU extension, Peter Maydell, 2020/02/11
- [PATCH 05/13] target/arm: Add and use FIELD definitions for ID_AA64DFR0_EL1, Peter Maydell, 2020/02/11
- [PATCH 01/13] target/arm: Add _aa32_ to isar_feature functions testing 32-bit ID registers, Peter Maydell, 2020/02/11