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Re: [PATCH v6 10/20] target/arm: Simplify set of PSTATE_SS in cpu_get_tb
From: |
Alex Bennée |
Subject: |
Re: [PATCH v6 10/20] target/arm: Simplify set of PSTATE_SS in cpu_get_tb_cpu_state |
Date: |
Mon, 14 Oct 2019 19:21:14 +0100 |
User-agent: |
mu4e 1.3.5; emacs 27.0.50 |
Richard Henderson <address@hidden> writes:
> Hoist the variable load for PSTATE into the existing test vs is_a64.
>
> Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
> ---
> target/arm/helper.c | 20 ++++++++------------
> 1 file changed, 8 insertions(+), 12 deletions(-)
>
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index e2a62cf19a..398e5f5d6d 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -11197,7 +11197,7 @@ void cpu_get_tb_cpu_state(CPUARMState *env,
> target_ulong *pc,
> ARMMMUIdx mmu_idx = arm_mmu_idx(env);
> int current_el = arm_current_el(env);
> int fp_el = fp_exception_el(env, current_el);
> - uint32_t flags;
> + uint32_t flags, pstate_for_ss;
>
> if (is_a64(env)) {
> *pc = env->pc;
> @@ -11205,6 +11205,7 @@ void cpu_get_tb_cpu_state(CPUARMState *env,
> target_ulong *pc,
> if (cpu_isar_feature(aa64_bti, env_archcpu(env))) {
> flags = FIELD_DP32(flags, TBFLAG_A64, BTYPE, env->btype);
> }
> + pstate_for_ss = env->pstate;
> } else {
> *pc = env->regs[15];
>
> @@ -11257,9 +11258,11 @@ void cpu_get_tb_cpu_state(CPUARMState *env,
> target_ulong *pc,
> || arm_el_is_aa64(env, 1) || arm_feature(env, ARM_FEATURE_M)) {
> flags = FIELD_DP32(flags, TBFLAG_A32, VFPEN, 1);
> }
> + pstate_for_ss = env->uncached_cpsr;
> }
>
> - /* The SS_ACTIVE and PSTATE_SS bits correspond to the state machine
> + /*
> + * The SS_ACTIVE and PSTATE_SS bits correspond to the state machine
> * states defined in the ARM ARM for software singlestep:
> * SS_ACTIVE PSTATE.SS State
> * 0 x Inactive (the TB flag for SS is always 0)
> @@ -11267,16 +11270,9 @@ void cpu_get_tb_cpu_state(CPUARMState *env,
> target_ulong *pc,
> * 1 1 Active-not-pending
> * SS_ACTIVE is set in hflags; PSTATE_SS is computed every TB.
> */
> - if (FIELD_EX32(flags, TBFLAG_ANY, SS_ACTIVE)) {
> - if (is_a64(env)) {
> - if (env->pstate & PSTATE_SS) {
> - flags = FIELD_DP32(flags, TBFLAG_ANY, PSTATE_SS, 1);
> - }
> - } else {
> - if (env->uncached_cpsr & PSTATE_SS) {
> - flags = FIELD_DP32(flags, TBFLAG_ANY, PSTATE_SS, 1);
> - }
> - }
> + if (FIELD_EX32(flags, TBFLAG_ANY, SS_ACTIVE) &&
> + (pstate_for_ss & PSTATE_SS)) {
> + flags = FIELD_DP32(flags, TBFLAG_ANY, PSTATE_SS, 1);
> }
>
> *pflags = flags;
--
Alex Bennée
- Re: [PATCH v6 05/20] target/arm: Split out rebuild_hflags_m32, (continued)
- [PATCH v6 06/20] target/arm: Reduce tests vs M-profile in cpu_get_tb_cpu_state, Richard Henderson, 2019/10/11
- [PATCH v6 07/20] target/arm: Split out rebuild_hflags_a32, Richard Henderson, 2019/10/11
- [PATCH v6 08/20] target/arm: Split out rebuild_hflags_aprofile, Richard Henderson, 2019/10/11
- [PATCH v6 09/20] target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state, Richard Henderson, 2019/10/11
- [PATCH v6 10/20] target/arm: Simplify set of PSTATE_SS in cpu_get_tb_cpu_state, Richard Henderson, 2019/10/11
- Re: [PATCH v6 10/20] target/arm: Simplify set of PSTATE_SS in cpu_get_tb_cpu_state,
Alex Bennée <=
- [PATCH v6 11/20] target/arm: Hoist computation of TBFLAG_A32.VFPEN, Richard Henderson, 2019/10/11
- [PATCH v6 13/20] target/arm: Split out arm_mmu_idx_el, Richard Henderson, 2019/10/11
- [PATCH v6 12/20] target/arm: Add arm_rebuild_hflags, Richard Henderson, 2019/10/11
- [PATCH v6 14/20] target/arm: Hoist store to cs_base in cpu_get_tb_cpu_state, Richard Henderson, 2019/10/11
- [PATCH v6 15/20] target/arm: Add HELPER(rebuild_hflags_{a32, a64, m32}), Richard Henderson, 2019/10/11