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[Qemu-arm] [PATCH v3 39/69] target/arm: Convert Unallocated memory hint
From: |
Richard Henderson |
Subject: |
[Qemu-arm] [PATCH v3 39/69] target/arm: Convert Unallocated memory hint |
Date: |
Wed, 28 Aug 2019 12:04:26 -0700 |
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/translate.c | 8 --------
target/arm/a32-uncond.decode | 8 ++++++++
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index c55bd1e563..07547f7b6c 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -10309,14 +10309,6 @@ static void disas_arm_insn(DisasContext *s, unsigned
int insn)
}
return;
}
- if (((insn & 0x0f700000) == 0x04100000) ||
- ((insn & 0x0f700010) == 0x06100000)) {
- if (!arm_dc_feature(s, ARM_FEATURE_V7MP)) {
- goto illegal_op;
- }
- return; /* v7MP: Unallocated memory hint: must NOP */
- }
-
if ((insn & 0x0e000f00) == 0x0c000100) {
if (arm_dc_feature(s, ARM_FEATURE_IWMMXT)) {
/* iWMMXt register transfer. */
diff --git a/target/arm/a32-uncond.decode b/target/arm/a32-uncond.decode
index ddc5edfa5e..60ccfc598d 100644
--- a/target/arm/a32-uncond.decode
+++ b/target/arm/a32-uncond.decode
@@ -64,3 +64,11 @@ PLI 1111 0100 -101 ---- 1111 ---- ---- ----
# (imm, lit) 7
PLD 1111 0111 -101 ---- 1111 ----- -- 0 ---- # (register) 5te
PLDW 1111 0111 -001 ---- 1111 ----- -- 0 ---- # (register) 7mp
PLI 1111 0110 -101 ---- 1111 ----- -- 0 ---- # (register) 7
+
+# Unallocated memory hints
+#
+# Since these are v7MP nops, and PLDW is v7MP and implemented as nop,
+# (ab)use the PLDW helper.
+
+PLDW 1111 0100 -001 ---- ---- ---- ---- ----
+PLDW 1111 0110 -001 ---- ---- ---- ---0 ----
--
2.17.1
- [Qemu-arm] [PATCH v3 54/69] target/arm: Convert T16 add, compare, move (two high registers), (continued)
- [Qemu-arm] [PATCH v3 54/69] target/arm: Convert T16 add, compare, move (two high registers), Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 56/69] target/arm: Convert T16, extract, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 58/69] target/arm: Convert T16, Reverse bytes, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 49/69] target/arm: Convert T16 add pc/sp (immediate), Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 36/69] target/arm: Convert CPS (privileged), Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 41/69] target/arm: Convert SG, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 47/69] target/arm: Convert T16 load/store (register offset), Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 52/69] target/arm: Convert T16 one low register and immediate, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 35/69] target/arm: Convert Clear-Exclusive, Barriers, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 39/69] target/arm: Convert Unallocated memory hint,
Richard Henderson <=
- [Qemu-arm] [PATCH v3 43/69] target/arm: Simplify disas_thumb2_insn, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 44/69] target/arm: Simplify disas_arm_insn, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 48/69] target/arm: Convert T16 load/store (immediate offset), Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 38/69] target/arm: Convert PLI, PLD, PLDW, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 42/69] target/arm: Convert TT, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 45/69] target/arm: Add skeleton for T16 decodetree, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 46/69] target/arm: Convert T16 data-processing (two low regs), Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 60/69] target/arm: Split gen_nop_hint, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 64/69] target/arm: Convert T16, shift immediate, Richard Henderson, 2019/08/28