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Re: [Qemu-arm] [PATCH 16/19] aspeed/smc: add support for DMAs

From: Joel Stanley
Subject: Re: [Qemu-arm] [PATCH 16/19] aspeed/smc: add support for DMAs
Date: Wed, 12 Jun 2019 01:38:06 +0000

On Sat, 25 May 2019 at 15:14, Cédric Le Goater <address@hidden> wrote:
> The FMC controller on the Aspeed SoCs support DMA to access the flash
> modules. It can operate in a normal mode, to copy to or from the flash
> module mapping window, or in a checksum calculation mode, to evaluate
> the best clock settings for reads.
> The model introduces two custom address spaces for DMAs: one for the
> AHB window of the FMC flash devices and one for the DRAM. The latter
> is populated using a "dram" link set from the machine with the RAM
> container region.
> Signed-off-by: Cédric Le Goater <address@hidden>

Cédric is our flash controller expert. This looks good as far as I can tell.

Acked-by: Joel Stanley <address@hidden>

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