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[Qemu-arm] [PATCH v2 01/42] decodetree: Fix comparison of Field
From: |
Peter Maydell |
Subject: |
[Qemu-arm] [PATCH v2 01/42] decodetree: Fix comparison of Field |
Date: |
Tue, 11 Jun 2019 11:53:10 +0100 |
From: Richard Henderson <address@hidden>
Typo comparing the sign of the field, twice, instead of also comparing
the mask of the field (which itself encodes both position and length).
Reported-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
scripts/decodetree.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/decodetree.py b/scripts/decodetree.py
index 81874e22cc7..d7a59d63ac3 100755
--- a/scripts/decodetree.py
+++ b/scripts/decodetree.py
@@ -184,7 +184,7 @@ class Field:
return '{0}(insn, {1}, {2})'.format(extr, self.pos, self.len)
def __eq__(self, other):
- return self.sign == other.sign and self.sign == other.sign
+ return self.sign == other.sign and self.mask == other.mask
def __ne__(self, other):
return not self.__eq__(other)
--
2.20.1
- [Qemu-arm] [PATCH v2 02/42] target/arm: Add stubs for AArch32 VFP decodetree, (continued)
- [Qemu-arm] [PATCH v2 02/42] target/arm: Add stubs for AArch32 VFP decodetree, Peter Maydell, 2019/06/11
- [Qemu-arm] [PATCH v2 03/42] target/arm: Factor out VFP access checking code, Peter Maydell, 2019/06/11
- [Qemu-arm] [PATCH v2 09/42] target/arm: Convert VCVTA/VCVTN/VCVTP/VCVTM to decodetree, Peter Maydell, 2019/06/11
- [Qemu-arm] [PATCH v2 06/42] target/arm: Convert the VSEL instructions to decodetree, Peter Maydell, 2019/06/11
- [Qemu-arm] [PATCH v2 14/42] target/arm: Convert VFP two-register transfer insns to decodetree, Peter Maydell, 2019/06/11
- [Qemu-arm] [PATCH v2 05/42] target/arm: Explicitly enable VFP short-vectors for aarch32 -cpu max, Peter Maydell, 2019/06/11
- [Qemu-arm] [PATCH v2 11/42] target/arm: Add helpers for VFP register loads and stores, Peter Maydell, 2019/06/11
- [Qemu-arm] [PATCH v2 13/42] target/arm: Convert "single-precision" register moves to decodetree, Peter Maydell, 2019/06/11
- [Qemu-arm] [PATCH v2 12/42] target/arm: Convert "double-precision" register moves to decodetree, Peter Maydell, 2019/06/11
- [Qemu-arm] [PATCH v2 07/42] target/arm: Convert VMINNM, VMAXNM to decodetree, Peter Maydell, 2019/06/11
- [Qemu-arm] [PATCH v2 01/42] decodetree: Fix comparison of Field,
Peter Maydell <=
- [Qemu-arm] [PATCH v2 08/42] target/arm: Convert VRINTA/VRINTN/VRINTP/VRINTM to decodetree, Peter Maydell, 2019/06/11
- [Qemu-arm] [PATCH v2 15/42] target/arm: Convert VFP VLDR and VSTR to decodetree, Peter Maydell, 2019/06/11
- [Qemu-arm] [PATCH v2 17/42] target/arm: Remove VLDR/VSTR/VLDM/VSTM use of cpu_F0s and cpu_F0d, Peter Maydell, 2019/06/11
- [Qemu-arm] [PATCH v2 10/42] target/arm: Move the VFP trans_* functions to translate-vfp.inc.c, Peter Maydell, 2019/06/11
- [Qemu-arm] [PATCH v2 22/42] target/arm: Convert VMUL to decodetree, Peter Maydell, 2019/06/11
- [Qemu-arm] [PATCH v2 16/42] target/arm: Convert the VFP load/store multiple insns to decodetree, Peter Maydell, 2019/06/11
- [Qemu-arm] [PATCH v2 24/42] target/arm: Convert VADD to decodetree, Peter Maydell, 2019/06/11
- [Qemu-arm] [PATCH v2 21/42] target/arm: Convert VFP VNMLA to decodetree, Peter Maydell, 2019/06/11
- [Qemu-arm] [PATCH v2 18/42] target/arm: Convert VFP VMLA to decodetree, Peter Maydell, 2019/06/11
- [Qemu-arm] [PATCH v2 19/42] target/arm: Convert VFP VMLS to decodetree, Peter Maydell, 2019/06/11